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Hardware Preparation and Installation
1
1-2
Debug Connector
Arbitration
Control
L2 Cache
1M
Processor
MPC750
Core Power
Ethernet
Intel 21143
10BT/
100BTx
RS232
IOMX
User I/O J3 & J5
Figure 1-1. MCPN750A Baseboard Block Diagram
DRAM
(Bank 1)
16M/64M/128M
Memory
Controller
Falcon 3
Chipset
SROM
AT24C04
PCI Bridge
Interrupt
& MPIC
Serializer
Raven 5 ASIC
Clock
Generator
33MHz 32/64-bit PCI Local Bus
PBC
VT82C586B
ISA
Registers
NVRAM/
WD/RTC
MK48T559
UARTs
16C550C
Computer Group Literature Center Web Site
DRAM
(Bank 2)
16M/64M/128M
Flash
(soldered)
4M
Flash
(socketed)
1M
System
Registers
Reset
Hot Swap
Control
Control
PCI-PCI BRIDGE
Intel 21554
CompactPCI J1/J2
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