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VCC3_3
I7107560
U6A
ICH2_5
AD[0..31]
17,18
AD[0..31]
AD0
AA4
AD0
AD1
AB4
AD1
AD2
Y4
AD2
AD3
W5
AD3
AD4
W4
AD4
AD5
Y5
AD5
AD6
AB3
AD6
AD7
AA5
AD7
AD8
AB5
AD8
AD9
Y3
AD9
AD10
W6
AD10
AD11
W3
AD11
AD12
Y6
AD12
AD13
Y2
AD13
AD14
AA6
AD14
AD15
Y1
AD15
AD16
V2
AD16
AD17
AA8
AD17
AD18
V1
AD18
AD19
AB8
AD19
AD20
U4
AD20
AD21
W9
AD21
AD22
U3
AD22
AD23
Y9
AD23
AD24
U2
AD24
AD25
AB9
AD25
AD26
U1
AD26
AD27
W10
AD27
AD28
T 4
AD28
AD29
Y10
AD29
AD30
T 3
AD30
AD31
AA10
AD31
17,18
C_BE#0
AA3
C_BE#0
AB6
17,18
C_BE#1
C_BE#1
Y8
17,18
C_BE#2
C_BE#2
AA9
17,18
C_BE#3
C_BE#3
W11
6
PCLK_0/ICH
PCICLK
V3
A
17,18,32
FRAME#
FRAME#
C39
AB7
17,18,32
DEVSEL#
DEVSEL#
W8
17,18,32
IRDY#
IRDY#
10PF
V4
17,18,32
TRDY#
TRDY#
NPOP
W1
17,18,32
STOP#
STOP#
AA15
32
ICHRST#
PCIRST#
AA7
17,18,32
PLOCK#
PLOCK#
W2
17,18
PAR
PAR
W7
17,18,32
SERR#
SERR#
Y7
17,18,32
PERR#
PERR#
Y15
17,18,22
PCI_PME#
PME#
M3
32
PCI_REQ#A
REQ#A/GPIO0
L2
GNT#A/GPIO16
N3
32
ICH_IRQ#E
PIRQ#E/GPIO02
N2
32
ICH_IRQ#F
PIRQ#F/GPIO03
N1
32
ICH_IRQ#G
PIRQ#G/GPIO04
M4
32
ICH_IRQ#H
PIRQ#H/GPIO05
Y11
15
P66DET
GPIO06
AA11
15
S66DET
GPIO07
Y14
32
GPI8
GPIO08
W14
26
EXTSMI#
GPIO12
AB15
16,32
LPC_PME#
GPIO13
A15
GPIO18
D14
GPIO19
C14
GPIO20
L1
GPIO21
B14
GPIO22
A14
15
GPIO23
GPIO23
AB14
32
GPIO27
GPIO27
AA14
32
GPIO28
GPIO28
A
VCC1_8
VCC1_8
V3SB
V3SB
V3SB
V1_8SB V1_8SB
ICH2 Part 1
A
HL[10:0]
HL[10:0]
D11
A20M#
A20M#
A12
CPUSLP#
CPUSLP#
R22
FERR#
FERR#
A11
IGNNE#
IGNNE#
C12
INIT#
INIT#
C11
INTR
INTR
B11
NMI
NMI
B12
SMI#
SMI#
C10
STPCLK#
STPCLK#
B13
RCIN#
KBRST#
C13
A20GATE
A20GATE
A13
CPU_PWGD
CPUPWRGOD
HL0
A4
HL0
HL1
B5
HL1
A5
HL2
HL2
B6
HL3
HL3
HL4
B7
HL4
HL5
A8
HL5
HL6
B8
HL6
HL7
A9
HL7
C8
HL8
HL8
HL9
C6
HL9
HL10
C7
HL10
C5
HL11
A6
HLSTB
HLSTB
A7
HLSTB#
HLSTB#
A3
HLCOMP
B4
HUBREF
P1
ICH_IRQ#A
PIRQ#A
P2
ICH_IRQ#B
PIRQ#B
P3
ICH_IRQ#C
PIRQ#C
N4
ICH_IRQ#D
PIRQ#D
F21
IRQ14
IRQ14
C16
IRQ15
IRQ15
N20
APICCLK
APICCLK_ICH
N19
APICD1
APICD1
P22
APICD0
APICD0
N21
SERIRQ
SERIRQ
R2
REQ#0
PREQ#0
R3
REQ#1
PREQ#1
T 1
PREQ#2
REQ#2
AB10
PREQ#3
REQ#3
P4
PREQ#4
REQ#4
L3
REQ#B/GPI1/REQ#5
PREQ#5
M2
GNT#0
PGNT#0
M1
PGNT#1
GNT#1
R4
PGNT#2
GNT#2
T 2
PGNT#3
GNT#3
R1
GNT#4
L4
GNT#B/GPO17/GNT#5
G2
LAN_RXD0
LAN_RXD0
G1
LAN_RXD1
LAN_RXD1
H1
LAN_RXD2
LAN_RXD2
RN29
22/8P4R
F3
1
2
LAN_TXD0
LAN_TXD0
F2
3
4
LAN_TXD2
LAN_TXD1
F1
5
6
LAN_TXD1
LAN_TXD2
7
8
H2
LAN_RSTSYNC
LAN_RSTSYNC
G3
LAN_CLK
LAN_CLK
Title:
Intel® 810e2 Chipset Universal Socket 370 CRB
ICH2 Part 1
IAMG Platform Apps Engineering
int e l
1900 Prairie City Road
R
Folsom, Ca. 95630
8
4
4
4,32
4
4,15
4
4
4
4
16,32
16,32
4 , 35
TPHL1
1
Test point
Place R
VCC1_8
within 0.5"
of HLCOMP
pin via a
PR7
10 mil wide
trace
40,1%
8
8
HUBREF
8
BC24
32
32
0.01UF
32
32
15
15
Place as close as
A
6
Possible to ICH2
4,32
4,32
and via straight
16,32
to VSS plane
17,32
17,32
18,32
18,32
32
32
17
17
18
18
26
26
26
26
26
26
26
26
REV.
1.0
Last Revision Date:
9/02/01
Sheet:
36
13
of
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