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3/ System Specifications
3.1. Component Main Data
The table below summarizes the features of the motherboard.
Table 3: Component Main Data
SMARC-sAMX8X
Form factor
Short size Smart Mobility ARChitecture (SMARC) Hardware with 82 mm x 50 mm, max.
thickness 6 mm
Processor
NXP i.MX8X 19mm x 19mm BGA package with 609 balls in 0.8 mm and 0.65mm pitch
(industrial version). Used processor types are i.MX 8 QuadXPlus, i.MX 8 DualXPlus and i.MX
8 DualX.
Memory
LPDDR4 @ 1200 MHz (no ECC)
Boot Flash
8 MB to 256 MB SPI NOR flash
Bootloader/BIOS
U-Boot Bootloader, Flash for Bootloader connected on SPI0.
embedded
Multimedia Card
(eMMC)
EEPROM
Display
Onboard Controllers
Ethernet Controller
1x GBE PHY DP83867IR, second ETH controller I210 optionally with PCIe switch
Watchdog Timer
CPU internal watchdog, configurable timeout counter with timeout periods from 0.5 to 128
seconds
USB HUB
USB HUB USB2517i for 5x USB 2.0 ports on SMARC Con.
PCI Switch
PCIe packet switch PI7C9X2G404SL
Display bridge
MIPI DSI to LVDS Flatlink SN65DSI84ZQER
Real Time Clock
High accuracy (+/-3%), low power, RV-8803
(RTC)
System
No dedicated System Management Controller on module System settings can be arranged
Management
in U-Boot environment variables
Controller
Storage
2 to 128 GB eMMC 5.0 Flash (option)
H/W Status
Voltage monitoring
Monitor
Security
APPROTECT Key optional
Power
management
Operating System
Linux Yocto, other Operating Systems only on customer request
Support
Interfaces via Smarc I/O
www.kontron.com
2 to 32 GB pseudo Single Level Cell (pSLC)
4 to 128 GB MLC (Multi-level Cell)
Type: 24C32, 4k x 8 (32 kbit)
Connected at I2C_GP bus at address 0x50 (7-bit)
18/24-bit LVDS RGB (True Color)
Resolution: up to 1920x1080 Pixel from MIPI-DSI
Single/Dual Channel
Clock Control Module (CCM)
General Power Controller (GPC)
System Reset Controller (SRC)
SMARC-sAMX8X User Guide. Rev. 1.1
// 15
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