External Codec/Gpio Expansion Header - J1 - Intrinsyc Open-Q 212A User Manual

Note
Not Available on the
212A dev. kit
PM8916-1
U24 on Carrier Board
U1 on Carrier Board
3.8.13 External Codec/GPIO Expansion Header – J1
J1 allows user to access SLIMBUS, I2S, power rails, and other GPIOs from APQ or PM8916-1 that
are not used by another peripheral on the carrier board. Please refer to the pinout table below for
detail.
Table 13 External Codec/GPIO Expansion Header J1 Pinout
Description
Not Available on GPIO_0_BLSP1_SPI_MO
the 212A dev. kit SI
Not Available on GPIO_1_BLSP1_SPI_MI
the 212A dev. kit SO
BLSP1 bit 1 GPIO_2_BLSP1_SPI_CS
(APQ GPIO 14) _N
BLSP1 bit 0 GPIO_3_BLSP1_SPI_CL
(APQ GPIO 15) K
GND GND
APQ GPIO 98 WCD_INT
Open-Q™ 212A Development Kit User Guide Version 1.0
Pin
Signal
#
CDC_MIC_BIAS3 25
CDC_MIC_BIAS4 27
GND 29
VREG_L5_1P8 31
MB_VREG_3P3 33
MB_VREG_5P0 35
NC 37
GND 39
Figure 15 External Codec/GPIO Expansion Header (J1)
Signal
Copyright Intrinsyc Technologies Corporation
Pin
Signal
#
26 212_DMIC0_CLK
28 212_DMIC0_DATA
30 GPIO_MIC_MUTE_STATUS
32 GND
34 GPIO_XX_MIC_SELECT
36 CDC_LINE_OUT_3
38 CDC_LINE_OUT_REF
40 CDC_LINE_OUT_4
Pin Pin
Signal
# #
1 2 GND
3 4 PM_GPIO_x_DIV_CLK2
5 6 PM_MPP_3
7 8 MI2S_1_D3
9 10 MI2S_1_D2
11 12 GND
25
Note
APQ GPIO_5
APQ GPIO_4
APQ GPIO_92
APQ GPIO_51
Description
GND
PM8916-1
GPIO_2
PM8916-1 Multi-
Purpose Pin 3
Not Available on
the 212A dev. kit
Can be configured
as APQ GPIO_93
by installing
R2111 on CB
Not Available on
the 212A dev. kit
Can be configured
as APQ GPIO_93
by installing
R2122 on CB
GND