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Related Manuals for Alpha Data ADM-SDEV-CFG1
Summary of Contents for Alpha Data ADM-SDEV-CFG1
- Page 1 ADM-SDEV-CFG1 User Manual Document Revision: 1.2 18th March 2020...
- Page 2 ADM-SDEV-CFG1 User Manual V1.2 - 18th March 2020 © 2020 Copyright Alpha Data Parallel Systems Ltd. All rights reserved. This publication is protected by Copyright Law, with all rights reserved. No part of this publication may be reproduced, in any shape or form, without prior written consent from Alpha Data Parallel Systems Ltd.
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Page 3: Table Of Contents
Table 5 IPASS PCIe Connections ........................6 Table 6 SATA Connections ..........................6 List of Figures Figure 1 ADM-SDEV-CFG1 Top and Bottom Views ..................1 Figure 2 ADM-SDEV-CFG1 Block Diagram ..................... 4 Figure 3 LED Locations ........................... 4 Figure 4... - Page 4 ADM-SDEV-CFG1 User Manual V1.2 - 18th March 2020 Page Intentionally left blank...
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Page 5: Introduction
The ADM-SDEV-CFG1 configuration module board forms part of the ADA-SDEV-KIT1 space FPGA development kit. The ADM-SDEV-CFG1 board connects to the configuration FMC socket of the ADM-SDEV-BASE board, allowing the Xilinx tools to interrogate and configure its FPGA. Figure 1 : ADM-SDEV-CFG1 Top and Bottom Views 1.1 Key Features... -
Page 6: References & Specifications
ADM-SDEV-CFG1 User Manual V1.2 - 18th March 2020 1.2 References & Specifications ANSI/VITA 57.1 FPGA Mezzanine Card (FMC) Standard, July 2008, VITA, ISBN 1-885731-49-3 ANSI/VITA 57.4 FPGA Mezzanine Card Plus(FMC+) Standard, March 2016, VITA, Draft Table 1 : References Page 2 Introduction ad-ug-1361_v1_2.pdf... -
Page 7: Installation
- Store in ESD safe bag. 2.2.2 Configuration FMC Board Prior to applying power to the ADM-SDEV-BASE board, the ADM-SDEV-CFG1 board should be fitted into the Config FMC Socket (J2). it is recommended that the PMC keying pillar should be fitted to the ADM-SDEV-BASE board. This will ensure that only an ADM-SDEV-CFG1 can be fitted to the config FMC Socket. -
Page 8: Functional Description
256M x2 Connector Connector Connector (x2) POWER FMC CONNECTOR Figure 2 : ADM-SDEV-CFG1 Block Diagram 3.1.1 LED Definitions The position and description of the board status LED is shown in Locations: Figure 3 : LED Locations Page 4 Functional Description... -
Page 9: Jtag Interface
ADM-SDEV-CFG1 User Manual V1.2 - 18th March 2020 Comp. Ref. Function ON State Off State 3.3V Supply D1(Green) Normal operation Power Off Status Table 2 : LED Definitions 3.2 JTAG Interface 3.2.1 On-board Interface The JTAG boundary scan chain can be accessed via a standard header (J2). -
Page 10: Clocks
MGT Quad 224 GBTCLK0_M2C MGT Quad 224 AT10 Table 5 : IPASS PCIe Connections 3.5 SATA Connectors The ADM-SDEV-CFG1 board has two standard right angle SATA receptacles for use with SATA compliant storage devices. Connector Signal FPGA Bank "P" pin "N"... -
Page 11: Gpio Loopback
ADM-SDEV-CFG1 User Manual V1.2 - 18th March 2020 ADM-SDEV-BASE user manual for more information. 3.7 GPIO Loopback Many of the unused FMC GPIO signals are looped back on the ADM-SDEV-CFG1 board for test purposes. Functional Description Page 7 ad-ug-1361_v1_2.pdf... - Page 12 ADM-SDEV-CFG1 User Manual V1.2 - 18th March 2020 Revision History Date Revision Nature of Change Initial Draft 12 Sep 2018 Updated LED definition 21 Nov 2018 First Release 27 Nov 2018 Removed reference to CDROM in section 2.1 13 May 2019...
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