Hitachi Hidic EH-150 Applications Manual page 78

Preliminary Rev.03
Exclusive Send Control Register (EXSR)
Bit
+2
Using this register Exclusive control of Send area of each connection can be specified.
If Exclusive control of Send area is specified, the send data collection from CPU module by this module will not be
done during this bit is set. During this bit is set, previous send data in this module is used to send.
Bit 15-6: Reserved
These bits are reserved. Please set "0" always.
Bit 5-0: Exclusive control changeover bit in the automatic sending (ECC[6:1])
This bit is effective to the connection which is declared as the connection on which Automatic Sending/Receiving
function is effective. Therefore, this bit is ignored when the connection is declared as the connection on which
Automatic Sending/Receiving is not effective.
Bit5-0: ECC[6:1]
0
1
The contents of this manual might be changed without notice.
15 14 13 12 11
- - - - -
Request to disable Exclusive send control of connection n.
Request to enable Exclusive send control of connection n.
10 9 8 7 6
- - - - -
Description
8-9
Chapter 8 Register Structure
5 4 3 2 1
ECC6 ECC5 ECC4 ECC3 ECC2 ECC1
0
(Initial set)