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6. Make sure that the MCU has a good clock source. Use an oscilloscope
7. Make sure that the MCU can enter and remain in monitor mode. For
M68ICS08ABUM/D
APPENDIX A – TECHNICAL REFERENCE & TROUBLESHOOTING
h. Make sure the serial data is getting to the MCU's PTA0 pin. First,
exit any ICS08ABZ software that may be running on the host PC.
Then disconnect power from the ICS08AB. Ensure that the
ICS08AB board is configured for the factory default settings.
Ensure that there is an MCU in XU1 and that it is inserted correctly.
Connect the serial cable between the host PC and the ICS08AB.
Apply power to the ICS08AB. Start the ICS08ABZ simulator soft-
ware as described in Section 1.6 HARDWARE QUICK START
INSTRUCTIONS. Probe the PTA0 pin (XU1 pin 26 or J3 pin 10)
for the serial data. Since the board power is turned off and on sev-
eral times during the connecting phase, the data observed at the
MCU's PTA0 pin is also affected.
to check the OSC1 input at the MCU (XU1 pin 59). Set the oscilloscope
to 0.1 ms per division. The oscillator should run when the MCU PWR
LED is on. You should observe approximately 2 divisions per cycle.
This corresponds to a 4.9152-MHz signal; the frequency required for a
9600-baud communications rate. If the clock signal is not present,
check to see that a jumper is installed on W5. This selects the ICS08AB
as the source of the OSC1 signal.
this to happen, the following conditions must occur:
a. At the rising edge of RST*, IRQ* must be at V
Using a dual-trace oscilloscope, trigger channel 1 on the rising edge
of RST* (XU1 pin 3) and read the IRQ* pin (XU1 pin 2) with chan-
nel 2. Start the ICS08ABZ software as described in Section 1.6
HARDWARE QUICK START INSTRUCTIONS and verify
that the IRQ* signal is approximately 8.0 Vdc when RST* rises. If
IRQ* is not at 8.0 Vdc, there may be a problem with the ICS08AB
board's IRQ circuit. Check D10 and R38 for the proper signals to
keep IRQ* at 8.0 Vdc during the period where RST* is low.
b. At the rising edge of RST*, PTA0, PTC0, PTC1, and PTC3 must
be held at logic values 1, 1, 0, and 0, respectively. The logic levels
are 5.0 V CMOS logic levels (with the factory default setting and
don't connect ICS08AB to target system).
loscope, trigger channel 1 on the rising edge of RST* (XU1 pin 3),
and read the corresponding MCU pin with channel 2. PTA0 (XU1
pin 26) is the serial data pin to and from the host PC and should be
around 5.0 Vdc at the rising edge of RST*. PTC0 (XU1 pin 60),
PTC1 (XU1 pin 61), and PTC3 (XU1 pin 63) are controlled by ana-
log switch U5 and should be approximately 5.0 V, 0 V and 0 V,
respectively, at the rising edge of RST*. Port pins PTC0, PTC1,
(8.0 Vdc).
TST
Using a dual-trace
oscil-
A-7
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