Siemens SIMATIC NET SPC 4-2 LF Manual page 126

Clock pulses at QCLK-IN
5 V
5 V
3.3 V
3.3 V
Clock timing:
Distortion of clock signal up to a ratio of :TCLL 40:60 permitted. At a threshold
of 1.5 or 3.7V and 0.7 or 1.8V:
CLK
Figure 10-1
Quartz connection:
M
P5
Figure 10-2
126
Operating voltage
TCL
H
1
Clock Timing
2
U-
4
U+
1
300R
EN
Quartz Connection
Transmission mode
asynchronous
synchronous
asynchronous
synchronous
TCL
G
3
5
48MHz
PROFIBUS Controller SPC 4®-2 LF
Clock max. = 1/T
48 MHz
40 MHz
20 MHz
16 MHz
L
2
SPC4
CLK
7
C
ISCLK-Out
C79000-G8976-C157-3