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C1120 S5 to II/O-Lightbus Interface
Status register S5 / C1120
The C1120 interface occupies the addresses PB/PY 250 to PB/PY 255 by default. This setup
is configurable. By generating a single transfer to peripherial byte PB/PY 255 (T PB 255) the
C1120 interface is interrupted for a single request. The peripherial byte PB/PY 254 is the
status register C1120.
S5 input status (readable with the command L PB 254)
Bit 0 : ACKN : acknowlege "single request II/O-Lightbus cycle finished"
Bit 1 : LIFE : This status bit toggles before transmission of I/O data to and from the
modules on the I/O list. By monitoring the LIFE bit in the STEP 5 program
it is possible to supervise the transmission of information to the indirect
modules, especially in case of short PLC cycle times.
Bit 2 : LWL-ERROR : This bit is set, if an error occurs in the II/O-Lightbus
System. Depending on the configuration of the field "error request" the PLC
reacts with a change to STOP mode ("error request" = "0") or not ("error
request" = "1").
Bit 3 : Local error on BK2000 module
Bit 4 : INPUT-VALID : indicates the input data to be valid after reset or program
start. The bit is set after complete initialization of the II/O-Lightbus System
and stays to be logic "1" afterwards.
S5 Output status (writeable with the command T PB 254)
Bit 0:
Strobe bit for a single request.
Bit 1:
Cycle mode ON ("0") or OFF ("1").
By setting this bit to "1", the cycle mode transmissions are stopped. Inputs
and Outputs are accessible only by single requests, until the cycle mode is
enabled again.
Bit 2:
Free running mode (bit processing only)
The free running mode disables the cycle mode. Information is transmitted
in an asynchronous way on the II/O Lightbus ring. Data bytes, which belong
together, have to be transmitted via the single request. The life bit is passive
in this mode.
Page 26 of 52
Beckhoff II/O-Lightbus System
Version 2.1
Date 27.06.97
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