T/R Module Control Signals; Change To Peripheral Module-Compatible Interface Section - Analog Devices ADAR1000-EVALZ User Manual

ADAR1000-EVALZ
Table 4. 1.8 V Logic Connector P6 Pinout
Pin Signal Name Function
1 CSB Serial port enable input (active low)
2 AGND Analog ground
3 SDIO Serial data input and output
4 AGND Analog ground
5 SDO Serial data output
6 AGND Analog ground
7 SCLK Serial clock input
8 AGND Analog ground
9 TR Transmit and receive switching input
10 AGND Analog ground
11 TX_LOAD Load transmit configurations input
12 AGND Analog ground
13 RX_LOAD Load receive configurations input
14 AGND Analog ground
15 PA_ON PA bias enable input
16 AGND Analog ground
Board Address Selection
The ADAR1000 supports up to four devices on the same serial
peripheral interface (SPI) connection, with each device identified
by the corresponding ADDR0 and ADDR1 pin logic values and
addressed by the SPI bits (AD1 and AD0). See the
datasheet for more details. Jumper Block P10 allows the user to
determine whether the ADDR0 and ADDR1 pin values are high
or low, as shown in Table 5. Note that P10 is labeled AD0 and
AD1 on the ADAR1000-EVALZ, which corresponds to the
ADDR0 and ADDR1 pins, respectively.
Table 5. Jumper Block P10 Selections
Jumper Connection
Position 1 to Position 3
Position 3 to Position 5
Position 3 (Not Connected)
Position 2 to Position 4
Position 4 to Position 6
Position 4 (Not Connected)
Peripheral Module-Compatible Interface
The 3.3 V digital interface signals are also repeated on
Connector P3, arranged to be compatible with the peripheral
module interface connector available on many field programmable
gate array (FPGA) evaluation kits or modules. Appropriate FPGA
programming is required to use this function. The pinout of the
P3 connector is shown in Table 6.
User Guide
ADAR1000
Function
AD1 is controlled by SDP GPIO2
AD1 = high
AD1 = low
AD0 is controlled by SDP GPIO3
AD0 = high
AD0 = low
Table 6. Peripheral Module-Compatible Interface (P3)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
TRANSMIT AND RECEIVE MODULE CONTROL
SIGNALS
The ADAR1000
receive modules, which typically contain an LNA, a PA, a
transmit and receive selection switch, and possibly a polarization
selection switch. The 24-pin header, P9, contains signals in
groups of six to control the four transmit and receive modules.
The pinout of P9 is shown in Table 7.
Table 7. Transmit and Receive Module Interface
Connector P9 Pinout
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Rev. A | Page 5 of 24
Signal
GPIO0 (RX_LOAD)
SPI_SEL_A
GPIO1 (TX_LOAD)
SPI_MOSI
GPIO4 (TR)
SPI_MISO
GPIO5 (PA_ON)
SPI_CLK
AGND
AGND
No connect
No connect
controls the operation of four transmit and
Signal
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS4
AGND
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS3
AGND
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS2
AGND
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS1
AGND
UG-1283