Al Event (Interrupt Event) And Interrupt Enable; Interrupt Enable Register (Address 0X0204:0205); Al Event (Address 0X220:0221) - Pilz PMCtendo DD5 Operating Manual

EtherCAT
4.2

AL event (interrupt event) and interrupt enable

The communication between the drive and EtherCAT FPGA is completely interrupt-con-
trolled. The Interrupt enable register and the Al event register are responsible for the inter-
rupt functionality of the EtherCAT interface. With a 1 in the corresponding Bit of the Inter-
rupt enable register the servo amplifier activates the individual events of the EtherCAT in-
terface, with a 0 the events are deactivated.
4.2.1

Interrupt enable register (address 0x0204:0205)

Parameter
AL Control
Event
--
DC Distributed
Clock
--
Mail Out Event
Mail In Event
Pro Out Event
Pro In Event
--
With a 1 in the relevant Bit of the AL Event register the EtherCAT interfaces signals to the
servo amplifier in the Interrupt routine which event is to be processes by the servo amplifier.
4.2.2

AL Event (address 0x220:0221)

Parameter
AL Control Event
Sync Manager
Watchdog Event
Distributed Clock
(DC) Event
--
Operating Manual EtherCAT for, PMCtendo DD5 and PMCprotego D
1002906-EN-02
ZA
Address Bit Drive
0x204 0 r/w
0x204 1 r/w
0x204 2 r/w
0x204 3 ... 7 r/w
0x205 0 r/w
0x205 1 r/w
0x205 2 r/w
0x205 3 r/w
0x205 4 ... 7 r/w
ZA
Address Bit Drive
0x220 0 r
0x220 1 r
0x220 2 r
0x220 3 ... 7 r
ZA
ECAT Description
r Activating the AL Control
Events for phase runup
r Reserved
r Activating the Distributed Clock
(DC) Interrupts for the complete
communication
r Reserved
r Activating the Mailbox Output
Event (SDO, Sync Manager 0)
for the object channel
r Activating the Mailbox Input
Event (SDO, Sync Manager 1)
for the object channel
r Activating the process data
Output Event (PDO, cyclical set
values of the card)
r Activating the process data In-
put Event (PDO, cyclical actual
values of the servo amplifier)
r Reserved
ZA
ECAT Description
r/w Editing the AL Control Events for
phase runup
r/w Editing a Sync Manager Watch-
dog Event
r/w Editing a Distributed Clock (DC)
Event
r/w Reserved
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