Analog Input Range Settings; Single-Ended Or Pseudo-Differential Input Configuration; Bipolar Input-Signal Configuration - Texas Instruments ADS8353EVM-PDK User Manual

EVM Analog Interface
2.1

Analog Input Range Settings

The full-scale range (FSR) of the ADSxx53 device can be programmed to either from (0 to 1 × V
2 × V ) range by setting bit B9 of the ADSxx53 configuration register. This register is common to both
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ADCs in the device (ADC_A and ADC_B). Configure the full-scale range setting in the EVM by navigating
to the ADSxx53EVM Settings page on the grpahical user interface (GUI); see section
information. Install jumpers JP3 and JP4 when supporting the 0 to 1 × V
and JP4 when supporting the 0 to 2 x V
Jumper Number Default Position
JP3
JP4
2.2

Single-Ended or Pseudo-Differential Input Configuration

The ADSxx53 dual, simultaneous ADC supports single-ended or pseudo-differential analog input signals.
To support single-ended inputs, set bit B7 in the configuration (CFR) register to 0 (CFR.B7 = 0), and
connect ADC inputs AINM_A and AINM_B to GND. These devices can also be programmed to support
pseudo-differential inputs by setting bit B7 in the CFR register to 1 (CFR.B7 = 1). In this configuration,
AINM_A is connected to FSR_ADC_A / 2, and AINM_B is connected to FSR_ADC_B / 2. Note that bit
CFR.B7 is common to both ADCs. By configuring jumpers JP7 and JP8 on the ADSxx53EVM, the
negative inputs of the ADC can be connected to GND to support the single-ended configuration, or
connected to FSR/2 when programmed to support pseudo-differential inputs, as shown in
Section 6.3 for more information.
FSR
0 V
Single-Ended Configuration
Figure 2. Single-Ended or Pseudo-Differential Input Configuration
2.3

Bipolar Input-Signal Configuration

The ADSxx53EVM-PDK supports both bipolar or unipolar input signals on the J1 (JP1.2) and J2 (JP2.2)
analog interface connectors. When jumpers JP9 and JP10 are closed, the inverting amplifier (OPA836) is
biased at the appropiate common-mode voltage level to support bipolar signals on the analog interface
connectors. In this configuration, apply a bipolar input signal with 0-V common-mode voltage.
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ADS8353EVM-PDK and ADS7853EVM-PDK
range, as shown in
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Table 3. Analog Input Range Jumpers
Installed Install for FSR = 0 to 1 × V
Installed Install for FSR = 0 to 1 × V
AINP_x
ADSxx53
AINM_x
FSR / 2
JP7/JP8:
Shunt 1-2
Copyright © 2014, Texas Instruments Incorporated
range, and remove jumpers JP3
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Table 3.
Description
; remove for FSR = 0 to 2 × V
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; remove for FSR = 0 to 2 × V
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FSR
0 V
FSR / 2
Pseudo-Differential Configuration
SBAU210A – June 2014 – Revised August 2014
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) or (0 to
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Section 6.3 for more
.
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.
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Figure 2. See
AINP_x
ADSxx53
AINM_x
JP7/JP8:
Shunt 2-3