Avaya CS 1000 Series Installation And Commissioning Manual page 39

Communication server, isdn basic rate interface
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Providing clock referencing on the SILC
Complete the following procedure to provide clock referencing on the SILC.
Providing clock referencing on the SILC
To install the NTRB53 Clock Controller for CS 1000 refer to NN43001-301
1. Maintain the same polarity on each transmit and receive. Rewire the selected Tx
2. Remove the phantom power jumpers (two jumpers per DSL) from the pin
3. Place the SILC in the selected IPE slot.
4. Configure the selected DSL as Terminal Equipment (TE) mode in LD 27.
5. Enable the clock in LD 60 to output the clock references to the IPE back plane
6. Configure the Clock Controller card to accept ISDN BRI clock reference.
7. Check the appropriate messages from the Clock Controller to ensure that it is
8. Connect the ISDN BRI clock reference cables to the Clock Controller, using the
Connecting clock reference cables
Complete this procedure to connect the ISDN BRI clock reference cables to the Clock
Controller. There are three different cables that route clock signals from the IPE back plane to
the Clock Controller face plate (as shown in
page 40). Refer to
Table 7: ISDN BRI clock reference tables
NTND70AA
NTND71AA-AD
NTND72AA
Note:
Measure the distance between the IPE and CE modules to ensure that you order the correct
cable lengths.
ISDN Basic Rate Interface Installation and Commissioning
and Rx pairs (applicable to DSL0 and DSL1) to exchange the Tx and Rx pair
position. This rewiring is done at the Main Distribution Frame (MDF).
headers.
pins.
synchronized to the proper clock reference in LD 60).
procedures which follow.
Table 7: ISDN BRI clock reference tables
Code
1.5
6.5, 12, 25, 42
6.5
Installing ISDN BRI hardware for trunk applications
Figure 11: Clock reference cable connection
Length (feet)
Connects IPE back plane to IPE I/
O panel.
Connects IPE I/O to CE I/O panel.
Connects CE I/O to Clock
Controller face plate.
on page 39.
Use
March 2011
on
39

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