AXIOMTEK SBC8241 User Manual page 28

SBC8241 486 All-in-One Half-size User's Manual
#" System BIOS Shadow Cacheable
When this option is set to Enabled, the contents of the F0000h system
memory segment can be read from or written to L2 secondary cache
memory. The contents of the F0000h memory segment are always
copied from the BIOS ROM to system RAM for faster execution. The
settings are Enabled or Disabled (default).
C000,16K Shadow, C400,16K Shadow, C800,16K
#"
Shadow, CC00,16K Shadow, D000,16K Shadow,
D400,16K Shadow, D800,16K Shadow, DC00,16K
Shadow, E000,32K, Shadow
These options control the location of the contents of the 16KB of ROM
beginning at the specified memory location. If no adapter ROM is using
the named ROM area, this area is made available to the local bus. The
settings are:
Setting
The contents of C0000h - C3FFFh are written to the same
Enabled
address in system memory (RAM) for faster execution.
The video ROM is not copied to RAM. The contents of the
Disabled
video ROM cannot be read from or written to cache
(default)
memory.
#" .5+.  !  0!
$  G %5$%5$   

 
   
   

 
"FE5"G %5$%5$ 
   C5 D$
  

     

#" DRAM Read/Write Timing
During read and write to the CPU, these options specify the RAS
access speed of the SIMMs installed on the CPU card as system
memory. The settings are Slow, Normal, Fast (default), Faster, Fastest.
CAUTION:
#" Memory Parity Check
Set this option to Enabled to check the parity of all system memory.
The settings are Disabled (default) or Enabled.
(1
Description
You must always use SIMMs that have the
same speed within a memory bank.
AMI BIOS Setup