Pci Connector J1 (Bottom - LSI LSI8751SP User Manual

Pci to ultra scsi host adapter
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Table A.3

PCI Connector J1 (Bottom)

Signal Name
TRST/
+12 V
TMS
TDI
+5 V
INTA/
INTC/
+5 V
RESERVED
3 V/5 V
RESERVED
KEYWAY
KEYWAY
RESERVED
RST/
3 V/5 V
GNT/
GND
RESERVED
AD30
+3.3 V
1.
Shaded signals are not connected.
Operational Environment
Pin
Signal Name
1
AD28
2
AD26
3
GND
4
AD24
5
IDSEL
6
+3.3 V
7
AD22
8
AD20
9
GND
10
AD18
11
AD16
12
+3.3 V
13
FRAME/
14
GND
15
TRDY/
16
GND
17
STOP/
18
+3.3 V
19
SDONE
20
SBO/
21
GND
1
Pin
Signal Name
22
PAR
23
AD15
24
+3.3 V
25
AD13
26
AD11
27
GND
28
AD09
29
KEYWAY
30
KEYWAY
31
C_BE0/
32
+3.3 V
33
AD06
34
AD04
35
GND
36
AD02
37
AD00
38
3 V/5 V
39
REQ64/
40
+5 V
41
+5 V
42
Pin
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
A-5

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