Technical Reference; Uart Register Description - AXIOMTEK AX10445 Series User Manual

Isolated dual channel rs422/485 interface module

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Table of Contents

3.1 UART Register Description

This section contains a brief description of the programmable

registers based on the settings of the DIP switches.

In data transmissions from one device to another, an

asynchronous serial communication is preferred. Serial

communication is cheaper than parallel as it requires fewer

data lines. Also, the asynchronous mode of transmission

makes much less demand on hardware because there is no

need for special hardware to maintain synchronism between

the transmitter and the receiver. In asynchronous

communication, data, usually referred to as character, are

transmitted independently. Each byte of data transmitted by

the serial port uses the following sequence of signals:

1. One start bit (the start bit signals the beginning of the

transmission of a new byte by driving the line low for

one cycle).

2. Eight data bits (seven in some situations).

3. Parity bit (if supplied, checks for errors in transmission).

4. One or two stop bits (it does not matter if 1 or 2 stop

bits are used, so long as both the transmitting port and

the receiving port use the same number).

An example of single byte asynchronous transmission format

is shown in Figure 3.

Start

bit

Start

Stop