Receive Address Map Size 2 Register (Rams2); Receive Address Map Offset 2 Register (Ramo2); Receive Address Map Size 2 Register (Rams2) Field Descriptions; Receive Address Map Offset 2 Register (Ramo2) Field Descriptions - Texas Instruments SPRU938B User Manual

VLYNQ Port Registers

3.11 Receive Address Map Size 2 Register (RAMS2)

The receive address map size 2 register (RAMS2) is used to identify the intended destination of inbound
serial packets. The RAMS2 is shown in
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 16. Receive Address Map Size 2 Register (RAMS2) Field Descriptions
Bit Field
31-2 RXADRSIZE2 0-3FFF FFFFh
1-0 Reserved

3.12 Receive Address Map Offset 2 Register (RAMO2)

The receive address map offset 2 register (RAMO2) is used with the receive address map size 2 register
(RAMS2) to translate receive packet addresses to local device configuration bus addresses. The RAMO2
is shown in Figure 20
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 17. Receive Address Map Offset 2 Register (RAMO2) Field Descriptions
Bit Field
31-2 RXADROFFSET2
1-0 Reserved
34 VLYNQ Port
Figure 19
Figure 19. Receive Address Map Size 2 Register (RAMS2)
RXADRSIZE2
R/W-0
Value Description
The RXADRSIZE2 field is used to determine if receive packets are destined for the second
of four mapped address regions. RXADRSIZE2 is compared with the address contained in
the receive packet. If the received packet address is less than the value in RXADRSIZE2,
the packet address is added to the receive address map offset 2 register (RAMO2) to obtain
the translated address.
0 Reserved. Always read as 0. Writes have no effect.
and described in Table
Figure 20. Receive Address Map Offset 2 Register (RAMO2)
RXADROFFSET2
R/W-0
Value Description
0-3FFF FFFFh The RXADROFFSET2 field is used with the receive address map size 2 register (RAMS2)
to determine the translated address for serial data. If the received packet address is less
than the value in RAMS2, the packet address is added to the contents of this register to
obtain the translated address.
0 Reserved. Always read as 0. Writes have no affect.
and described in Table
17.
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16.
2 1
Reserved
2 1
Reserved
SPRU938B – September 2007
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0
R-0
0
R-0