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Appendix A VLYNQ Protocol Specifications
A.1
Introduction
VLYNQ relies on 8b/10b block coding to minimize the number of serial pins and allow for in-band packet
delineation and control. The following sections include general 8b/10b coding definitions and their
implementation.
A.2
Special 8b/10b Code Groups
Code Group Name
K28.0
K28.1
K28.2
K28.3
K28.4
K28.5
K28.6
K28.7
K23.7
K27.7
K29.7
K30.7
A.3
Supported Ordered Sets
Each VLYNQ module must support a limited number of ordered sets. Ordered sets provide for the
delineation of packets and synchronization between VLYNQ modules at opposite ends of the serial
connection. VLYNQ 2.0 and later versions do not require some of the following ordered sets.
Code
/I/
/T/
/M/
/P/
/C/
/E/
/0/
/I/
/L/
SPRU938B – September 2007
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Table A-1. Special 8b/10b Code Groups
Octet Value
Octet Bits
1C
0001 1100
3C
0011 1100
5C
0101 1100
7C
0111 1100
9C
1001 1100
BC
1011 1100
DC
1101 1100
FC
1111 1100
F7
1111 0111
FB
1111 1011
FD
1111 1101
FE
1111 1110
Table A-2. Supported Ordered Sets
Ordered Set
Idle
End of Packet
Byte Disable
Flow Control Enable
Flow Control Disable
Error Indication
Init0
Init1
Link
Current RD -
Current RD +
001111 0100
110000 1011
001111 1001
110000 0110
001111 0101
110000 1010
001111 0011
110000 1100
001111 0010
110000 1101
001111 1010
110000 0101
001111 0110
110000 1001
001111 1000
110000 0111
111010 1000
000101 0111
110110 1000
001001 0111
101110 1000
010001 0111
011110 1000
100001 0111
Encoding
/K28.5/
/K29.7/
/K23.7/
/K28.0/
/K28.2/
/K28.1/
/K28.4/
/K28.6/
/K30.7/
VLYNQ Protocol Specifications
Appendix A
Octet Value
BC
FD
F7
IC
5C
3C
9C
DC
FE
39
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