TDK-Lambda GENESYS 750W HALF RACK Technical Manual page 75

3. Status Enable Register
The Status Enable Register is set by the user to Enable SRQs for changes in power supply
status.
Table 7-12: Status Enable Register
BIT Status name
0 (LSB)
Constant Voltage
1
Constant Current
2
No Fault
3
Fault active
4
Auto-Restart enabled
5
Fold enabled
6
Spare
7 (MSB)
Local Mode
4. Status Event Register
The Status Event Register will set a bit if a change in the power supply status occurs and it is en-
abled. The register is cleared when the "SEVE?" or "CLS" commands are received. A change in
this register will generate SRQ.
Table 7-13: Status Event Register
BIT Status name
0 (LSB)
Constant Voltage
1
Constant Current
2
No Fault
3
Fault active
Auto-Restart en-
4
abled
5
Fold enabled
6
Spare
7 (MSB)
Local Mode
Status
Bit Set condition
symbol
CV
User command:
"SENA nn" is
CC
received, where
NFLT
nn is hexadeci-
mal bits.
FLT
AST Always zero
FDE Always zero
Spare Always zero
"SENA nn"
LCL
command
Status sym-
Bit Set condition
bol
Changes in status
CV
occur and it is
Enabled.
The change can
CC
set a bit, but
NFLT
when the change
clears the bit re-
FLT
mains set.
0 Always zero
0 Always zero
0 Always zero
Unit is set to Lo-
cal by pressing
LCL
front panel
REM/LOC button.
67
83-507-5002 Rev. B
Bit reset condition
User command: "SENA
nn" is received, where nn
is hexadecimal bits.
If "nn"=00, no SRQ is sent
when there is a change in
Status Condition Register.
Always zero
Always zero
Always zero
"SENA nn"
command
Bit reset condition
Entire Event Register is
cleared when user sends
"SEVE?" command to
read the register.
"CLS" and power-up also
clear the Status Event
Register.