Processor 3/6 - Clevo PB70RC-G Service Manual

Processor 3/6

5
DIFF=85ohm, L=4"~9"
40 PCH_CPU_BCLK_R_DP
40 PCH_CPU_BCLK_R_DN
40 PCH_CPU_PCIBCLK_R_DP
40 PCH_CPU_PCIBCLK_R_DN
D 40 CPU_24MHZ_R_DP
40 CPU_24MHZ_R_DN
Close to CPU
H_VIDALERT_N
R105 56.2_1%_04 R100 220_04
1.05V_VCCST
R104 100_04
71 H_CPU_SVIDALRT#
R875 *0402_short-p D02 1002 pwr debug
71 H_CPU_SVIDCLK
R876 *0402_short-p
71 H_CPU_SVIDDAT
H_PROCHOT# H_PROCHOT#_R
R541 499_1%_04
71 H_PROCHOT#
C1293 *0.1u_10V_X5R_04
68 DDR_VTT_PG_CTRL
Close to CPU
VCCST_PW RGD R585 60.4_1%_04 VCCST_PW RGD_R
38 H_PW RGD
37 PLTRST_CPU#
37 H_PM_SYNC
H_PM_DOW N_R
R540 20_1%_04
37 H_PM_DOW N
H_PECI_R
R537 *0402_short-p
55 H_PECI
37 H_THERMTRIP#
C
39 H_SKTOCC_N
SKL_CNL_N
R539 100K_04
3.3VA
R577 *0_04
SKL_CNL_N:
FLOAT FOR SKL
R867
GND FOR CNL
*0402_short-p
D02 0920 pwr debug
VCCST_PWRGD
VDD3 1.05V_VCCST
B
R574 R575
100K_04 1K_04
VCCST_PW RGD
10,43,55,64,71 ALL_SYS_PW RGD
D D
C1337
5 G 2 G
*0.1u_10V_X5R_04 S Q51B S Q51A
MTDK3S6R MTDK3S6R
1.05V_VCCSTG
H_PROCHOT_EC
R543
1K_04
H_PROCHOT#
Q43
A
G
55 H_PROCHOT_EC
UK3018 2.5V drive
R547
*100K_04
5
4 3
U38E
B31 BN25 CFG0
BCLKP CFG_0 D02 0928 for PEG reverse
A32 BN27
BCLKN CFG_1
BN26 CFG2 R106 1K_04
CFG_2
D35 BN28
PCI_BCLKP CFG_3
C36 BR20 CFG4 R546 1K_04
PCI_BCLKN CFG_4
BM20 CFG5 R549 *1K_04
CFG_5
E31 BT20 CFG6 R548 *1K_04
CLK24P CFG_6
D31 BP20 CFG7
CLK24N CFG_7
BR23
CFG_8
BR22
CFG_9
BT23
CFG_10
BT22
CFG_11
BM19
CFG_12
BR19
CFG_13
BP19
CFG_14
BH31 BT19
VIDALERT# CFG_15
BH32
VIDSCK
BH29 BN23
VIDSOUT CFG_17
BR30 BP23 H_TDO R544
PROCHOT# CFG_16
BP22
CFG_19
H_TCK
BT13 BN22 R542
DDR_VTT_CNTL CFG_18
CLOSE TO CPU
SKL_XDP_MBP_0
BR27
< 1.1"
BPM#_0
SKL_XDP_MBP_1
BT27
BPM#_1
SKL_MBP_2
BM31
BPM#_2
H13 BT30 SKL_MBP_3
VCCST_PWRGD BPM#_3
BT31
PROCPWRGD
H_TDO
BP35 BT28
H_TDO 38
RESET# PROC_TDO
BM34 BL32
H_TDI 38
PM_SYNC PROC_TDI
BP31 BP28
PM_DOWN PROC_TMS H_TMS 38
H_TCK
BT34 BR28
PECI PROC_TCK H_TCK 38
J31
THERMTRIP#
BP30
H_TRST# 43
PROC_TRST#
BR33 BL30
SKTOCC# PROC_PREQ# H_PREQ# 43
BN1 BP27
PROC_SELECT# PROC_PRDY# H_PRDY# 43
BM30
PLACE UNDER CPU
CATERR# CFG_RCOMP
BT25 R545 49.9_1%_04
CFG_RCOMP
AT13
ZVM#
AW13
MSM#
AU13
RSVD1
AY13
RSVD2
5 OF 13
CFL_H_62_INT_IP_CRB_CFLH/BGA
PCI Express* Static x16 Lane Numbering Reversal
CFG2
eDP Enable:
CFG4
C1335
*0.1u_10V_X5R_04
PCIE PORT BIFURCATION STRAPS
CFG[6:5]
PEG Training:
CFG7
10,29,31,34,35,36,37,38,41,43,45,46,52,53,55,57,58,64,65,66,67,68,69,71,72,74,77,78
4 3
2
CFG Hi Low DESCRIPTION
0 NORM Stall Ear
1 NORM Pchless Pchless Mode
2 NORM Reverse PEG_LANE_REVERSAL-SEE PCIE CHAPTER
3 Enabled Disabled Physical_Debug_Enabled
4 Disable Enabled DP_Presence
5 Disable Enabled PEG0CFGSEL[0]
6 Disable Enabled PEG0CFGSEL[1]
7 Reset# BIOS REQ PEG_Defer_Training
8 Disable Enable CFG Unlock
9 Present Not Present SVID Not Present
1.05V_VCCST
10 Activate Not Activate Safe Mode Boot
51_04
Half-Swing Full-Swing
51_04 11 DMI_AC_coupled
DC coupled AC coupled
12 Pmsync2.0 Legacy
13 Asynchronous Synchronous Sync and Aync Mode
14 Reserved
15 Reserved
PEG CONFIG TABLE CFG [6:5]
CFG6 CFG5 PEG CONFIG
0V 0V X 8 X 4 X 4
0V 1V RESERVED
1V 0V X 8 X 8
1V 1V X 16
* All CFG 0 = Physical Strap Hi
* All CFG 1 = Physical Strap Lo
1: Normal operation
0: Lane numbers reversed
1: Disabled
0: Enabled
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
1: (Default) PEG Train immediately following RESET# de assertion.
0: PEG Wait for BIOS for training
Title Title Title
[02-3] CPU E/13 CLK,JTAG [02-3] CPU E/13 CLK,JTAG [02-3] CPU E/13 CLK,JTAG
VDD3
29,34,35,37,38,41,43,52,64,65,68,69 3.3VA
7,65 1.05V_VCCSTG
Size Size Size Document Number Document Number Document Number
7,37,38,65,71 1.05V_VCCST 6-71-PB500-D03 6-71-PB500-D03 6-71-PB500-D03
A3 A3 A3 PB50EF PB50EF PB50EF
Date: Date: Date: Friday, December 07, 2018 Friday, December 07, 2018 Friday, December 07, 2018
2
Schematic Diagrams
1
D
11: Default X 16
10: 2X8
01: RESERVED
C
00: X8 , X4 , X4 Sheet 4 of 91
Processor 3/6
B
A
R e v R e v R e v
D03 D03 D03
Sheet Sheet Sheet 4 4 4 o f o f o f 91 91 91
1
Processor 3/6 B - 5