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Schematic Diagrams
TR-TBT
RTD3 Support:
In order to support RTD3, DG_PERST#
and DG_PEWAKE#
signals should reserve connections to
dedicated PCH GPIOs
per TBT Controllers.
In order to support RTD3, the
following signals should be
routed from PCH to TBT Controller:
DG_PERST#
DG_CLKREQ#
DG_PEWAKE#
D
DG_RTD3_PWR_EN
RTD3_PWR_EN:
When unsued should be PU to 3v3sx
GPIO8:
'0' - Unsecure mode
'1' - Secure mode
Sheet 59 of 91
TBT_SLP_S3_N
TR-TBT
C
61
GPIO0_TBT_RESET#
D01A 0828
Prevent leakage current
B
VCC3V3_FLASH
A
R252
3.3K_1%_04
TBT
B - 60 TR-TBT
5
4
37
PCIE_TXP17_TBT
37
PCIE_TXN17_TBT
37
PCIE_TXP18_TBT
37
PCIE_TXN18_TBT
37
PCIE_TXP19_TBT
37
PCIE_TXN19_TBT
CPU PCIE TX
37
PCIE_TXP20_TBT
37
PCIE_TXN20_TBT
40
TBT_REFCLK_100_P
40
TBT_REFCLK_100_N
40
TBT_CLKREQ#
TBT
C1042
0.22u_10V_X5R_04
13
PS8330B_D0P
TBT
C1046
0.22u_10V_X5R_04
13
PS8330B_D0N
TBT
C1050
0.22u_10V_X5R_04
13
PS8330B_D1P
TBT
C1057
0.22u_10V_X5R_04
13
PS8330B_D1N
TBT
C1062
0.22u_10V_X5R_04
13
PS8330B_D2P
TBT
C1069
0.22u_10V_X5R_04
13
PS8330B_D2N
DDI(MUX)
TBT
C1074
0.22u_10V_X5R_04
13
PS8330B_D3P
TBT
C1085
0.22u_10V_X5R_04
13
PS8330B_D3N
TBT
C989
0.22u_10V_X5R_04
13
PS8330B_AUXp_SCL
TBT
C990
0.22u_10V_X5R_04
13
PS8330B_AUXn_SDA
VCC3V3_SX_SYS
13
PS8330B_HPD
R272
U48
1
*TC7SZ08FU
4
2
SUSB#
10,43,54,64
DPSNK1_AUX_P
TBT
C1003
TBT
47p_25V_NPO_02
R686
*0_04
D01A 0822 Change footprint
1/5 add,
TBT
IF NOT SUPPORT TBT WAKE UP , NO STUFF
DPSNK1_AUX_N
for Titan Ridge change
follow PA70ES
VCC3V3_SX_SYS
TBT
R705
R854
10K_04
1
TBT_RESET#
TBT
4
2
U63
TBT
TC7SZ08FU
R694
4.75K_0.5%_04
20180605
TBT
follow common design
+/- 0.5%
modify net name
62
TBTA_RX1_P
RX1
62
TBTA_RX1_N
TX1
62
TBTA_TX1_P
20180622
62
TBTA_TX1_N
Modlfy TBT and
USB3.1 co-lay circuit
RX2
62
TBTA_RX2_P
62
TBTA_RX2_N
TBT USB TYPE C
62
TBTA_TX2_P
TX2
62
TBTA_TX2_N
62
TBTA_SBU1
62
TBTA_SBU2
20180411 modify
TBTA_HPD
61
TBTA_HPD
TBTA_I2C_INT
61
TBTA_I2C_INT
TBTA_USB2_MXCTL
TBT
R243
TBT
R241
R750
200_1%_04
TR/PPS COMMON FLASH
TBT
USB2 Rbias
MLCC Comm part
Place as close as possible to pins
C1012
0.1u_6.3V_X5R_02
TBT
R234
U15
TBT_EE_DI
8
5
3.3K_1%_04
VDD
SI
2
TBT_EE_DO
TBT
SO
TBT_EE_W P_N
TBT_EE_CS_N
3
1
WP#
CE#
6
TBT_EE_CLK
SCK
TBT_HOLD_N
7
4
HOLD#
VSS
TBT
W 25Q80DV
5
4
3
U17A
PET0_P
Y23
V23
PCIE_RX0_P
PCIE_TX0_P
Y22
V22
PET0_N
PCIE_RX0_N
PCIE_TX0_N
PET1_P
T23
P23
PCIE_RX1_P
PCIE_TX1_P
PET1_N
T22
P22
PCIE_RX1_N
PCIE_TX1_N
M23
K23
PET2_P
PCIE_RX2_P
PCIE_TX2_P
PET2_N
M22
K22
PCIE_RX2_N
PCIE_TX2_N
PET3_P
H23
F23
PCIE_RX3_P
PCIE_TX3_P
H22
F22
PET3_N
PCIE_RX3_N
PCIE_TX3_N
TBT_BUF_PLT_RST#
V19
T4
PCIE_REFCLK_100_IN_P
PERST_N
TBT_PCIE_W AKE_N
T19
Y2
PCIE_REFCLK_100_IN_N
PEWAKE_N
PCIe_RBIAS
Y6
N16
PCIE_CLKREQ_N
PCIE_RBIAS
DPSNK1_ML0_P
AC7
AB21
DPSNK1_ML0_P
DPSRC_ML0_P
DPSNK1_ML0_N
AB7
AC21
DPSNK1_ML0_N
DPSRC_ML0_N
DPSNK1_ML1_P
AB9
AC19
DPSNK1_ML1_P
DPSRC_ML1_P
DPSNK1_ML1_N
AC9
AB19
DPSNK1_ML1_N
DPSRC_ML1_N
DPSNK1_ML2_P
AC11
AB17
DPSNK1_ML2_N
DPSNK1_ML2_P
DPSRC_ML2_P
AB11
AC17
DPSNK1_ML2_N
DPSRC_ML2_N
DPSNK1_ML3_P
AB13
AC15
DPSNK1_ML3_P
DPSRC_ML3_P
DPSNK1_ML3_N
AC13
AB15
DPSNK1_ML3_N
DPSRC_ML3_N
DPSNK1_AUX_P
N1
N4
DPSNK1_AUX_P
DPSRC_AUX_P
DPSNK1_AUX_N
N2
N5
DPSNK1_AUX_N
DPSRC_AUX_N
AA2
R5
TBT_SRC_HPD
DPSNK1_HPD
DPSRC_HPD
100K_04
TBT
TBT_GPIO0
A5
W1
DPSNK2_ML0_P
GPIO_0
TBT_GPIO1
B5
W2
DPSNK2_ML0_N
GPIO_1
W6
TBT_GPIO8
TMU_CLKIN
TBT_GPIO3
B3
Y1
DPSNK2_ML1_P
TMU_CLKOUT
TBT_CIO_PLUG_EVENT_N
A3
AA1
DPSNK2_ML1_N
CIO_PLUG_EVENT_N
C2
V2
TBT_I2C_SCL
DPSNK2_ML2_P
I2C_SCL
TBT_I2C_SDA
C1
V1
DPSNK2_ML2_N
I2C_SDA
TBT_USB_FORCE_PWR
V5
USB_FORCE_PWR
TBT_FORCE_PW R
E2
V4
DPSNK2_ML3_P
FORCE_PWR
TBT_BATLOW _N
E1
U2
DPSNK2_ML3_N
BATLOW_N
U1
TBT_SLP_S3_N
SLP_S3_N
TBT_RTD3_PW R_EN
P1
T5
DPSNK2_AUX_P
RTD3_PWR_EN
P2
DPSNK2_AUX_N
TBT_EE_DI
Y18
EE_DI
DPSNK2_HPD
Y4
W16
TBT_EE_DO
100K_04
DPSNK2_HPD
EE_DO
TBT_EE_CS_N
W18
EE_CS_N
TBT_EE_CLK
AC3
Y16
NC_AC3
EE_CLK
TBT_EE_W P_N
AB3
W4
NC_AB3
EE_WP_N
TBT_TDI
AC5
W20
NC_AC5
TDI
TBT_TMS
AB5
Y20
NC_AB5
TMS
TBT_TCK
W19
TCK
TBT_TDO
Y19
TDO
TBT_RESET#
E5
RESET_N
TBT_XTAL_25_IN
D22
XTAL_25_IN
TBT_RBIAS
TBT_XTAL_25_OUT
J6
MISC
D23
RBIAS
XTAL_25_OUT
TBT_RSENSE
J5
RSENSE
B21
A13
ASSRXp1
NC_A13
A21
B13
ASSRXn1
NC_B13
A19
A11
ASSTXp1
NC_A11
B19
B11
ASSTXn1
NC_B11
A15
B7
ASSRXp2
NC_B7
B15
A7
ASSRXn2
NC_A7
A17
A9
ASSTXp2
NC_A9
B17
B9
ASSTXn2
NC_B9
H4
L4
ASBU1
NC_L4
J4
L5
ASBU2
NC_L5
E20
E19
PA_USB2_D_P
NC_E19
D20
D19
PA_USB2_D_N
NC_D19
TBT
TBTB_HPD
TBT
T2
T1
PA_HPD
POC_GPIO_9
M4
M5
PA_I2C_INT
NC_M5
TBTB_USB2_MXCTL
R2
R1
PA_USB2_MXCTL
POC_GPIO_12
100K_04
H19
F19
PA_USB2_RBIAS
NC_F19
100K_04
TBTA_TEST_PWR_GOOD
V8
W5
THERMDA
TEST_PWR_GOOD
D4
R4
TEST_EDM
TEST_EN
L8
B23
FUSE_VQPS_64
USB2_ATEST
PA_USB2_RBIAS
A23
DEBUG
AB23
PA_MONDC
PCIE_ATEST
A1
J9
PB_MONDC
ATEST_P
AC23
J11
PC_MONDC
ATEST_N
AC1
H5
USB_MONDC
VGA_RES
D5
MONDC_SVR
MP C1 JHL7340
TBT
3
2
1
TBT
C1110
0.22u_10V_X5R_04
PCIE_RXP17_TBT
37
TBT
C1109
0.22u_10V_X5R_04
PCIE_RXN17_TBT
37
TBT
C1112
0.22u_10V_X5R_04
PCIE_RXP18_TBT
37
TBT
C1111
0.22u_10V_X5R_04
PCIE_RXN18_TBT
37
TBT
C1114
0.22u_10V_X5R_04
CPU PCIE RX
PCIE_RXP19_TBT
37
TBT
C1113
0.22u_10V_X5R_04
PCIE_RXN19_TBT
37
TBT
C1116
0.22u_10V_X5R_04
PCIE_RXP20_TBT
37
TBT
C1115
0.22u_10V_X5R_04
PCIE_RXN20_TBT
37
TBT
R737
3.01K_1%_04
R912
*0_04
TBT
GPP_K18_TBT_W AKE#
D02 1016 Rsvd.
R687
*0_04
TBT
R718
0_04
TBT
TBT_GPIO_WAKE#
VCC3V3_SX_SYS
Connect to PCH GPP_H9
U49
1
TC7SZ08FU
BUF_PLT_RST#
43,45,46,52,53,55,63
TBT_BUF_PLT_RST#
4
2
R685
*10K_04
TBT
VCC3V3_SX_SYS
20180809 modify
R683
100K_04
R913
0_04
TBT
D03
TBT_GPIO_RST#
39
TBT
Connect to PCH GPP_I5
TBT
R898
100K_04
TBT
20180724 Add for TBT RTD3
R914
*0_04
TBT
GPP_F4_TBT_RST#
37
TBT
R701
100K_04
TBT
R237
100K_04
TBT
R238
100K_04
TBT
R259
100K_04
R267
0_04
TBCIO_PLUG_EVENT#
39
TBT
TBT_I2C_SCL
61
TBT_I2C_SDA
61
R702
0_04
TBT_FORCE_PW R_R
35
TBT
R695
0_04
TBT_RTD3_PW R_EN_R
35
TBT
R899
100K_04
TBT
TBT_EE_DI
61
D02 1017 GPIO leakage
TBT_EE_DO
61
TBT_EE_CS_N
61
TBT_CIO_PLUG_EVENT_N
R263
TBT_EE_CLK
61
TBT_SLP_S3_N
R689
TBT_FORCE_PW R
R696
*10K_04
R745
TBT
R709
VCC3V3_LC
*10K_04
R746
TBT
*10K_04
R744
TBT
*10K_04
R733
TBT
TBTA_TEST_PWR_GOOD
R706
TBT_USB_FORCE_PWR
R720
X1
XTAL
2
1
3
4
C1108
FSX3L 25MHZ
C1095
TBT
D02 1017
D02 1017
5p_50V_NPO_04
5p_50V_NPO_04
TBT
TBT
TBT_EE_CS_N
R258
TBT_EE_DO
R250
TBT_I2C_SCL
R656
TBT_I2C_SDA
R648
R240
100K_04
TBT
TBTA_I2C_INT
R693
R242
100K_04
TBT
TBTA_I2C_INT
R708
TBT_BATLOW _N
USB2 Rbias
R239
TBT_PCIE_W AKE_N
R714
Place as close as possible to pins
TBT_RTD3_PW R_EN
R707
TBT_RESET#
R672
TBT_GPIO8
R713
GPIO8:
R717
'0' - Unsecure mode
'1' - Secure mode
Title
Title
Title
11-3-1 TR-TBT
11-3-1 TR-TBT
11-3-1 TR-TBT
60
VCC3V3_LC
60,61
VCC3V3_SX_SYS
Size
Size
Size
Document Number
Document Number
Document Number
6-71-PB500-D03
6-71-PB500-D03
6-71-PB500-D03
60
VCC3V3_S0_SYS
A3
A3
A3
PB50EF
PB50EF
PB50EF
61,62
VCC3V3_FLASH
Date:
Date:
Date:
Friday, December 07, 2018
Friday, December 07, 2018
Friday, December 07, 2018
Sheet
Sheet
Sheet
59
59
59
2
1
D
D03
39
40
D03
C
VCC3V3_S0_SYS
10K_04
TBT
10K_04
TBT
*10K_04
TBT
100K_04
TBT
200_1%_04
TBT
100K_04
TBT
B
VCC3V3_FLASH
2.2K_04
TBT
2.2K_04
TBT
2.2K_04
TBT
2.2K_04
TBT
*10K_04
TBT
D02 1003A
follow
unstuff
VCC3V3_SX_SYS
*10K_04
TBT
10K_04
TBT
10K_04
TBT
10K_04
TBT
*10K_04
TBT
10K_04
TBT
*100K_04
TBT
D02 1003A
follow
A
stuff and unstuff
R e v
R e v
R e v
D03
D03
D03
o f
o f
o f
91
91
91
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