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Frame Buffer Partition A
5
FRAME BUFFER PARTITION A 63..32
VRAM=K4Z80325BC-HC14
M2A
NORMAL
FBA_D39
B4
DQ0_A
FBA_D35
A3
DQ1_A
FBA_D32
B3
DQ2_A
D
FBA_D38
B2
20180719
DQ3_A
FBA_D34
Modify the order
E3
DQ4_A
FBA_D33
E2
DQ5_A
FBA_D37
F2
DQ6_A
FBA_D36
G2
DQ7_A
FBA_EDC4
C2
EDC0_A
FBA_DBI4
D2
DBI0_A
FBA_W CK45
D4
WCK0_t_A
FBA_W CK45*
D5
WCK0_c_A
x16
x8
FBA_D43
B11
NC
FBA_D46
DQ8_A
A12
DQ9_A
NC
FBA_D44
B12
NC
DQ10_A
FBA_D42
B13
NC
DQ11_A
FBA_D45
E12
NC
DQ12_A
FBA_D40
E13
DQ13_A
NC
FBA_D41
F13
DQ14_A
NC
FBA_D47
G13
NC
DQ15_A
FBA_EDC5
C13
EDC1_A
GND
FBA_DBI5
D13
DBI1_A
NC
FBA_W CKB45
D11
WCK1_t_A
NC
FBA_W CKB45*
D10
WCK1_c_A
NC
C
K4Z80325BC-HC14
P/N =
Close to DRAM
Close to DRAM
FBVDDQ
FBVDDQ
C1233
C76
C1234
C1257
C1239
C132
Around DRAM
Around DRAM
FBVDDQ
FBVDDQ
C53
C287
C1426
C194
C271
C103
B
FBVDDQ
FBVDDQ
Right under DRAM
Right under DRAM
C70
C189
C1256
C1261
C136
C1242
C124
C1244
C178
C1262
FBVDDQ
FBVDDQ
Close to DRAM
Close to DRAM
A
C162
C177
C1255
C164
C163
C170
C141
C182
C87
C145
5
4
3
16
FBA_W CK45
16
FBA_W CK45*
16
FBA_W CK67
16
FBA_W CK67*
M2B
16
FBA_W CKB45
NORMAL
16
FBA_W CKB45*
16
FBA_W CKB67
16
FBA_W CKB67*
x16
x8
FBA_D57
U4
DQ0_B
NC
FBA_D56
V3
DQ1_B
NC
FBA_D59
U3
DQ2_B
NC
FBA_D58
U2
DQ3_B
NC
FBA_D61
P3
DQ4_B
NC
FBA_CMD20
H3
FBA_D60
P2
DQ5_B
NC
FBA_CMD28
G11
FBA_D63
N2
DQ6_B
NC
FBA_CMD21
G4
FBA_D62
M2
DQ7_B
NC
FBA_CMD29
H12
FBA_CMD23
H5
FBA_EDC7
T2
EDC0_B
GND
FBA_CMD27
H10
FBA_DBI7
R2
DBI0_B
NC
FBA_CMD30
J12
FBA_CMD31
J11
FBA_W CKB67
R4
WCK0_t_B
NC
FBA_CMD19
J4
FBA_W CKB67*
R5
FBA_CMD17
WCK0_c_B
NC
J3
FBA_CMD22
J5
FBA_D49
U11
DQ8_B
FBA_CMD26
G10
FBA_D50
V12
DQ9_B
FBA_D53
U12
DQ10_B
FBA_D48
U13
DQ11_B
FBA_D52
P12
DQ12_B
FBA_D51
P13
DQ13_B
FBA_D54
N13
DQ14_B
FBA_D55
M13
DQ15_B
FBA_CMD16
L3
FBA_EDC6
T13
EDC1_B
FBA_CMD25
M11
FBA_DBI6
R13
DBI1_B
FBA_CMD24
M4
FBA_CMD33
L12
FBA_W CK67
R11
FBA_CMD23
WCK1_t_B
L5
FBA_W CK67*
R10
WCK1_c_B
FBA_CMD27
L10
FBA_CMD30
K12
FBA_CMD31
K11
FBA_CMD19
K4
K4Z80325BC-HC14
FBA_CMD17
K3
P/N =
FBA_CMD22
K5
FBA_CMD26
M10
FBA_CMD18
J1
K10
16
FBA_CLK1*
J10
16
FBA_CLK1
OPTION, Under DRAM
1V8_AON
C1241
C193
C190
C63
C58
C75
C56
20180802 0.47u_4V_X6S_02 to 0.47u_6.3V_X5R_04
FBVDDQ
FBVDDQ
C78
C84
C129
C105
C154
C80
C57
C93
C140
C122
C74
4
3
2
FBA_W CK45
FBA_DBI[7..4]
M2D
FBA_W CK45*
16
FBA_DBI[7..4]
FBA_W CK67
FBA_EDC[7..4]
FBA_W CK67*
16
FBA_EDC[7..4]
FBA_CMD[31..16]
FBA_W CKB45
16
FBA_CMD[31..16]
FBA_W CKB45*
FBA_CMD33
A11
VSS
16
FBA_CMD33
FBA_W CKB67
A13
VSS
FBA_W CKB67*
FBA_D[63..32]
A2
16
FBA_D[63..32]
VSS
A4
VSS
B1
VSS
M2C
B14
VSS
C10
VSS
C12
VSS
K1
C3
CA0_A
VREFC
VSS
FBA_VREFC
17
C5
CA1_A
VSS
D1
CA2_A
VSS
C113
D12
CA3_A
VSS
D14
CA4_A
VSS
*820p_50V_X7R_04
D3
CA5_A
VSS
E11
CA6_A
VSS
20180720 Modify
E4
CA7_A
VSS
F1
CA8_A
VSS
F12
CA9_A
VSS
F14
CABI_A
VSS
F3
CKE_A
VSS
G1
VSS
N5
G12
TCK
VSS
F10
G14
TDI
VSS
N10
20180809 Del test point
G3
TDO
VSS
F5
H11
TMS
VSS
H4
VSS
L11
VSS
L4
CA0_B
VSS
M1
CA1_B
VSS
M12
CA2_B
VSS
M14
CA3_B
VSS
M3
CA4_B
VSS
N1
CA5_B
VSS
N12
CA6_B
VSS
N14
CA7_B
VSS
N3
CA8_B
VSS
P11
CA9_B
VSS
P4
CABI_B
VSS
R1
CKE_B
VSS
J14
FBA_ZQ_2_A
R12
ZQ_A
VSS
K14
FBA_ZQ_2_B
R14
ZQ_B
VSS
R3
VSS
T10
VSS
R65
R72
T12
VSS
T3
RESET
VSS
121_1%_04
121_1%_04
T5
VSS
U1
VSS
U14
VSS
V11
CLK_c
VSS
V13
CLK_t
VSS
V2
VSS
V4
VSS
G5
RFU_A
20180809 Del test point
M5
RFU_B
K4Z80325BC-HC14
K4Z80325BC-HC14
P/N =
P/N =
17,19,20,22,23,24,25,26,29,30,31,32,34,66,74,77
C88
C102
C104
16,17,19,20,21,22,23,24,25,30,32,77
Title
Title
Title
[18] FBA[63..32]
[18] FBA[63..32]
[18] FBA[63..32]
Size
Size
Size
Document Number
Document Number
Document Number
6-71-PB500-D03
6-71-PB500-D03
6-71-PB500-D03
A3
A3
A3
PB50EF
PB50EF
PB50EF
Date:
Date:
Date:
Thursday, January 31, 2019
Thursday, January 31, 2019
Thursday, January 31, 2019
2
Schematic Diagrams
1
FBVDDQ
A1
VDD
A14
VDD
E10
VDD
E5
VDD
H13
VDD
H2
VDD
L13
D
VDD
L2
VDD
P10
VDD
P5
VDD
V1
VDD
V14
VDD
FBVDDQ
B10
VDDQ
B5
VDDQ
C1
VDDQ
C11
VDDQ
C14
VDDQ
Sheet 18 of 91
C4
VDDQ
E1
VDDQ
E14
VDDQ
F11
Frame Buffer
VDDQ
F4
VDDQ
H1
VDDQ
H14
VDDQ
J13
Partition A
VDDQ
J2
VDDQ
K13
VDDQ
K2
VDDQ
L1
VDDQ
C
L14
VDDQ
N11
VDDQ
N4
VDDQ
P1
VDDQ
P14
VDDQ
T1
VDDQ
T11
VDDQ
T14
VDDQ
T4
VDDQ
U10
VDDQ
U5
VDDQ
1V8_AON
A10
VPP
A5
VPP
V10
VPP
V5
VPP
B
A
1V8_AON
FBVDDQ
R e v
R e v
R e v
D03
D03
D03
Sheet
Sheet
Sheet
18
18
18
o f
o f
o f
91
91
91
1
Frame Buffer Partition A B - 19
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