Anx7440 - Clevo PB70RC-G Service Manual

ANX7440

5
20180709 Modify
USB3.1/DP MUX ANX7440
Ferrite Beads choose low DCR parts.
might choose,
BKP1608HS600-T
VDD0.9_LEX
BLM18SG221TN1
BLM18SG121TN1
D
Note:
1. These capacitors are used to reduce the slew rate of AUX CH to
meet the DP V1.4 AUX CH requirement.
2. These capacitors are mandatory for HBR3 application, for HBR2
and lower, the caps are optional.
3. Both the upstream and downstream port need to add the
capacitor for HBR3 application.
MDP_F_AUX_SCL TYPEC_SBU1
C91 C1171
18p_25V_NPO_02 18p_25V_NPO_02
down size down size
MDP_F_AUX#_SDA TYPEC_SBU2
D02 0928 follow P95
R872 100K_1%_04
C NV3V3
R511 *100K_1%_04 AAUX#_SDA
3.3V
From
AAUX_SCL NV Port_F
R512 100K_1%_04
DIFF=90ohm, L<6"
MDP_F_AUX_SCL
From Nv
27 MDP_F_AUX_SCL
MDP_F_AUX#_SDA
DIFF=90ohm, L<6" 27 MDP_F_AUX#_SDA
Note:
Both SSTx and SSRx between USB host
USB3.1 Gen2 from PCH
and ANX7440 need AC capacitors.
USB host SSTx connects to ANX7440 SSRx. DIFF= 80ohm, L<5"
USB host SSRx connects to ANX7440 SSTx.
The capacitors should be placed
near SSTx pin.
D02 0914
D02 1004
3.3V
D02 0928 follow P95
ANX7440_SDA
R31 1.8K_1%_04
ANX7440_SCL
R28 1.8K_1%_04
20180723 FAE recommend
OP_MODE_1/O MODE
B
20180723 FAE recommend
00 Disabled
01 USB3(default)
10 DP
11 USB3 + DP
20180723 FAE recommend
ANX_1.8V ANX_1.8V
D02 0914
R27 R26
*4.7K_04 *4.7K_04
ANX7440_I2C_ADR_SEL0
ANX7440_I2C_ADR_SEL1
R38 R37
D02 0914 FLIP:
4.7K_04 4.7K_04 USB Typc-C Orientation:
0=normal, 1=flipped
A
CC1 detection is normal
or
CC2 detection is flipped
Compatible with 3.3V input.
5
4 3
but not limited to:
220ohm,
2.5A,
DCR=0.04ohm
L29 HCB1608KF-300T60
P/N = 6-19-31001-275
C45
DCR = 0.04ohm
Impedance = 125ohm
C1240 C48 C40
Rated Current = 3A
4.7u_6.3V_X5R_04
4.7u_6.3V_X5R_04 1000p_50V_X7R_04 0.01u_16V_X7R_04
Note:
Capacitors
close to pin21
VDD0.9_LEX
L7 HCB1608KF-300T60
P/N = 6-19-31001-275 C55
C35
DCR = 0.04ohm
Impedance = 125ohm
Rated Current = 3A
20180720 1u_6.3V_X5R_02 1000p_50V_X7R_04
FAE recommend
U35
Note:
AC capacitors for DP
main link should be put
close to DP source
55
C1227 0.1u_10V_X7R_04
27 MDP_F0
ML0P
C1230 0.1u_10V_X7R_04 56 max=
27 MDP_F#0
ML0N 509mA
C1229 0.1u_10V_X7R_04 58
27 MDP_F1 ML1P
C1232 0.1u_10V_X7R_04 59
27 MDP_F#1 ML1N
2
C1247 0.1u_10V_X7R_04 Analogix Semi
27 MDP_F2
ML2P
C1248 0.1u_10V_X7R_04 3
27 MDP_F#2 ML2N
C1249 0.1u_10V_X7R_04 5
27 MDP_F3 ML3P
C1250 0.1u_10V_X7R_04 6
27 MDP_F#3 ML3N
D02 0928 follow P95 PWR Rail=
AAUX_SCL
C1245 0.1u_10V_X7R_04 8
AVDD09
AUXP
AAUX#_SDA
C1246 0.1u_10V_X7R_04 9
AUXN
C1224 0.22u_10V_X5R_04 52
39 USB3_RX1# SSTXN
53
C1226 0.22u_10V_X5R_04
39 USB3_RX1
SSTXP
C1222 0.22u_10V_X5R_04 49
SSRXN
39 USB3_TX1#
C1225 0.22u_10V_X5R_04 50
39 USB3_TX1 SSRXP
20180719
Modify C value
7
ANX_1.8V ANX_1.8V
51 ANX7440_POW ER_EN POWER_EN
28 PWR Rail=
TEST_R
VDD_IO
D02 0928 follow P95
ANX7440_SDA
38
R39 R40 51 ANX7440_SDA SDA
ANX7440_SCL
37 Compatible w/3.3V input
51 ANX7440_SCL SCL
*4.7K_04 4.7K_04
ANX7440_OP_MODE_0
43
OP_MODE_0 Internal DC-DC 0.9v
ANX7440_OP_MODE_1
42
OP_MODE_1 output: Maximum 500mA
ANX7440_FLIP
29
FLIP PWR Rail=
R47 R48 Internal 45K ohm pull-down.
VDD_IO
ANX7440_I2C_ADR_SEL0
36
I2C_ADR_SEL0
4.7K_04 *4.7K_04 ANX7440_I2C_ADR_SEL1 35
I2C_ADR_SEL1
47
DCI_CLK
46
PWR Rail=
DCI_DAT VDD33
DCI debug interface
40
TEST_EN
D02 0914
ANX_1.8V
R493
*4.7K_04
ANX7440_FLIP 20180719
Del ANX7440_PWER_EN RC
R491
4.7K_04
20180720
FAE recommend
4 3
2
Layout rules:
1. Place ANX7440/30/90/96 and USB Type-C/Type-A connector in an open area for
easier routing.
2. High-speed trace should be routed with high-priority.
3. If using internal DC/DC, create a dedicated DC/DC VGND
4. High-speed trace must keep distance from DC/DC and other noise source. RX
to TX spacing should be >20mils.
5. High-speed trace must be continuous and without stub, especially to RX
traces.
6. Ground void should be applied to wide pad along the high-speed traces.
7. ESD ground should be wide.
8. Every AVDD09 pin must have a 0.01uF decoupling capacitor that is very
close.
9. AVDD09 power delivery must be wide and away from noisy signal.
ANX7440 PWR ON SEQ
D02 0914
ANX_1.8V
VDD_IO/VDD33
20180719 Modify from 3.3V to 1.8VA VDD18
C1206 C1199 C37
ANX_1.8V
POWER_EN
C42 0.1u_6.3V_X5R_02
20180727
FLIP/OP_MODE
3.3V
MLCC Comm part
C46 1u_6.3V_X5R_02
C44 1000p_50V_X7R_04
Close to
max=
USB TYPE-C Conn.
0.0096mA
19 C1173 0.22u_10V_X5R_04
TX1P
20
C1172 0.22u_10V_X5R_04
TX1N
max=
16 C1584 0.33u_6.3V_X5R_04
1.1mA
RX1N
17 C1585 0.33u_6.3V_X5R_04
RX1P
D02 0928 follow P95
24 C17 0.22u_10V_X5R_04
PWR Rail= TX2P
23 C16 0.22u_10V_X5R_04
AVDD09
TX2N
26 C1586 0.33u_6.3V_X5R_04
RX2N
27 C1587 0.33u_6.3V_X5R_04
RX2P
D02 0928 follow P95
TYPEC_SBU1
34 C18 0.1u_10V_X7R_04
SBU1 TYPEC_SBU2
33 C19 0.1u_10V_X7R_04
SBU2
45 R473 100K_04
PULL_1
PWR Rail=
44 R474 100K_04
VDD33 PULL_2
14
VIN
C54 C99 C98 C97
down size
1000p_50V_X7R_04 0.1u_25V_X7R_06 10u_6.3V_X5R_06 22u_6.3V_X5R_06
ESR<20mOhm.
VDD0.9_LEX
13 Output L30
ahp252012ra-xxxm
VX
AHP252012RA-3R3M GND_DCDC
15 P/N = 6-19-41001-049
VFB
Chock chooses 3.3uH;
>500mA
C67
DCR<100mOhm.
12 0.1u_25V_X7R_06
VGND
GND_DCDC
31 GND_DCDC
XTAL_O
D02 1017
30 C1209 10p_50V_NPO_04
XTAL_I
R488 X3
1M_04 FSX3M_24MHZ
ANX7440QN-CB-R
PCB Footprint = qfn60-7x7mmb-1 D02 1017
C1216 10p_50V_NPO_04
D01A 0903 Change footprint
Title Title Title
[50] USB3.1/DP MUX ANX7440 [50] USB3.1/DP MUX ANX7440 [50] USB3.1/DP MUX ANX7440
11,12,15,28,29,31,64,74,75 NV3V3
Size Size Size Document Number Document Number Document Number
3,10,15,49,51,60,62,63,64,65,68,70,71,72 3.3V 6-71-PB500-D03 6-71-PB500-D03 6-71-PB500-D03
A3 A3 A3 PB50EF PB50EF PB50EF
10 ANX_1.8V
Date: Date: Date: Friday, December 07, 2018 Friday, December 07, 2018 Friday, December 07, 2018
2
Schematic Diagrams
1
D
t 0 0 m s
t 1 0 m s
t2>12ms
VALID
Sheet 50 of 91
ANX7440
C
TYPEC_TX1+ 51
TYPEC_TX1- 51
TYPEC_RX1- 51
TYPEC_RX1+ 51
TYPEC_TX2+ 51
TYPEC_TX2- 51
TYPEC_RX2- 51
TYPEC_RX2+ 51
TYPEC_SBU1 51
TYPEC_SBU2 51
D02 0914
ANX_1.8V
600ohm,
1.3A,
DCR=0.15ohm
L8 HCB1005KF-121T20
P/N = 6-19-31001-275
DCR = 0.1ohm
Impedance = 120ohm
Rated Current = 2A
B
C68
22u_6.3V_X5R_06
down size
Signal GND and
GND_DCDC must be
separated. They
are connected at
a single point.
R63 0_06
R56 0_06
GND_DCDC A
R e v R e v R e v
D03 D03 D03
Sheet Sheet Sheet 50 50 50 o f o f o f 91 91 91
1
ANX7440 B - 51