Transceiver Connections; Figure 39 Transceiver Configuration - Microchip Technology Microsemi PolarFire Demo Manual

Appendix: 1G Ethernet BASE-T and BASE-X Using Transceiver
Figure 39 • Transceiver Configuration
7.3

Transceiver Connections

This section describes the typical transceiver to CoreTSE connections in BASE-T and BASE-X design.
The following table lists the transceiver input and output port connections.
Table 7 • XCVR Port Connections
Port Name
CTRL_CLK
CTRL_ARST_N
Table 6 • XCVR Configuration (continued)
Parameters
CDR reference clock frequency 125 MHz
PCS
PCS-fabric interface width
FPGA interface frequency
PMA Mode
Clocks and Resets
TX clock
RX clock
PCS Reset
Input or Output
Input
Microsemi Proprietary DG0799 Demo Guide Revision 3.0
Settings
10 bits
125 MHz
Enabled
Regional
Regional
RX Only
Connection Description
40 MHz clock for the enhanced
receiver management logic
Can be sourced from the on-chip 160
MHz RC oscillator through a clock
divider
or
Can be connected to the output fabric
clock of CCC
Input signal to reset ERM. Drive this
signal from the XCVR_INIT_DONE
signal of the PF_INIT_MONITOR
component.
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