Revision History Revision History The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication. Revision 5.0 Added Table 7, page 12 that lists the suggested power regulators. Revision 4.0 Added performance measurement data for different protocols, see Appendix 4: Performance Data,...
Getting Started Getting Started ® The Microsemi PolarFire FPGA Evaluation Kit (MPF300-EVAL-KIT), which is RoHS-compliant, enables you to evaluate the PolarFire family of FPGAs with support for the following interfaces: • PCI Express Gen1 and Gen2 • 1 GbE • DDR3 and DDR4 memory •...
Getting Started Board Overview The PolarFire Evaluation Board features the PolarFire MPF300TS-1FCG1152I FPGA. The device has the following capabilities: • 20 Kb dual-port or two-port large static random access memory (LSRAM) block with a built-in single error correct double error detect (SECDED) •...
Getting Started The following table lists the important components of the PolarFire Evaluation Board: PolarFire Evaluation Board Components Table 2 • Component Label on Board Description Featured Device PolarFire FPGA MPF300TS-1FCG1152I FPGA with data security feature Power Supply and Monitoring 12 V power supply The board is powered by a 12 V power source using an input...
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Getting Started Table 2 • PolarFire Evaluation Board Components (continued) Component Label on Board Description x4 PCIe edge PCIe edge connector with four lanes connector Tx/Rx XCVR2 SMA XCVR0 TXD0P pairs XCVR0 TXD0N XCVR0 RXD0P XCVR0 RXD0N Two 10/100/1000 J15 and J30 Ethernet (RJ45) jacks with external magnetics interfacing Ethernet RJ45 with Microsemi quad 10/100/1000 BASE-T PHY chip and...
Getting Started Compatibility With Daughter Boards Daughter boards with FMC connectors can be plugged into the PolarFire Evaluation board. Handling the Board Pay attention to the following points while handling or operating the board to avoid possible damage or malfunction: •...
Installation and Settings Installation and Settings This section provides information about the software and hardware settings required to run the pre-programmed demo design on the PolarFire Evaluation Board. Software Settings ® Download and install the latest release of Microsemi Libero SoC PolarFire from the Microsemi website, and register for a free one-year Libero Gold software license.
Installation and Settings Table 3 • Jumper Settings (continued) Jumper Description Default Setting Jumper to Close pin 1 and 2 for programming through the External Open select between SPI flash FTDI SPI or External SPI Flash to program the device Jumper to Close pin 1 and 2 to define the SPI Slave mode Open...
Installation and Settings Table 4 • LEDs (continued) Description DS13- Green VCCIO_HPC_VADJ voltage DS14 - Green VDDAUX Voltage rail DS18 - Green 12 V voltage rail DS16 - Green 5 V voltage rail DS17 - Green 3.3 V voltage rail 3.2.3 Test Points The following table lists USB, ground, and other test points.
Installation and Settings Power Sources The PolarFire Evaluation Board uses Microsemi power supply devices. For more information about power supply devices, see www.microsemi.com/product-directory/ics/853- power-management. The following table lists the key power supplies required for normal operation of the PolarFire Evaluation Board.
Installation and Settings Figure 3 • Voltage Rails in PolarFire Evaluation Board 12V DC - JACK 12VO_IN VDD25/VDDA25/ IRF_12V VDD_XCVR_CLK Switching PMOS Switch PMOS Switch Linear Regulator 2.5 V Regulator Gate Gate Gate Bank Supply switching 1.2/2.5/1.8/1.5/1.2 V Regulator VDD18/Bank Supply 1.8 V Switching Main ON/OFF...
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Installation and Settings Table 7 • Power Regulators (continued) Voltage rail Part Number Description Current VDD25, VDDA25, MIC69502WR IC REG LINEAR POS ADJ 5A SPAK-7 VDD_XCVR_CLK VDD18 MIC69502WR IC REG LINEAR POS ADJ 5A SPAK-7 These regulators are not pin compatible with the existing evaluation kit schematics. Use these regulators for new board designs.
Board Components and Operations Board Components and Operations This section describes the key components of the PolarFire Evaluation board and important board operations. For device datasheets, visit www.microsemi.com/products/fpga-soc/design-resources/dev- kits/polarfire-kits. Memory Interface GPIO and HSIO bank I/Os for DDR3 and DDR4 are available in the PolarFire device. In addition to dedicated I/Os, regular I/Os can also be used to connect to other memory devices.
Board Components and Operations Figure 5 • DDR4 Memory Interface DDR4 Chips PolarFire Data DQ[31:0] DQS/DQS#[3:0] DDR4 SDRAM HSIO-BANK0,7 1G×8 (1 GB) 4 memory chips Address A[15:0] Control lines For more information, see the Board Level Schematics document (provided separately). SPI Serial Flash The SPI flash specifications for the PolarFire device are: •...
Board Components and Operations The following figure shows the XCVR0 interface of the PolarFire Evaluation Board. XCVR0 Interface Figure 7 • PolarFire Lane0/ RXD Lane1/ RXD Lane2/ RXD Lane3/ RXD PCIe Edge connector Lane0/ TXD Lane1/ TXD Lane2/ TXD Lane3/ TXD REFCLK0 For information about PCI Express support in PolarFire, see UG0685: PolarFire FPGA PCI Express User...
Board Components and Operations 4.3.3 XCVR2 Interface The XCVR2 interface has four lanes connected as follows: • Lane 0 is connected to SMA connectors. • TX pad > trace > AC coupling > trace > SMA connectors (J41 (P) and J42 (N)) •...
Board Components and Operations 4.4.1 Microsemi 1588v2 (ZL30364GDG2) The PolarFire Evaluation Board uses Microsemi ZL30364GDG2 to provide the 125 MHz clock and reserved clocks to VSC8575 PHY. Device ZL30364GDG2 is configurable through the SPI interface and connected to the PolarFire device. The ZL30364GDG2 clock outputs are LVPECL and LVCMOS. Key features of Microsemi PHY ZL30364GDG2 are as follows: •...
Board Components and Operations The following figure shows the Microsemi PolarFire Power measurement system on the PolarFire Evaluation Board. Figure 12 • Power Management PolarFire Power Management Schematic VDD25/VDDA25_MON_SIG 12V Input PMOS PMOS Jack 12V to 5V/6A PTH08T231WAZ VDD_IN 12V Enable Power VDD25/5A Switch...
Board Components and Operations The following figure shows the FTDI interface of the PolarFire Evaluation Board. Figure 13 • FTDI Interface PolarFire HSIO Bank6 UART JTAG SIGNALS Header JTAG JTAG Bank3 SIGNALS Jumper J18,19,20,21,22 USB mini B Port A FT4232 connector External J28 Jumper...
Board Components and Operations 4.9.1 User LEDs The board has eight active-High LEDs that are connected to the PolarFire device. The following table lists the on-board user LEDs. Table 8 • User LEDs PolarFire PolarFire FPGA Evaluation Board Pin Number PolarFire FPGA Pin Name Bank LED7...
Board Components and Operations The following figure shows the switches interface of the PolarFire Evaluation Board. Figure 16 • Switches Interface 1.8 V PolarFire SW10 4.9.3 Slide Switches (DPDT) The SW3 slide switch powers the device ON or OFF from +12 V external DC jack. 4.9.4 DIP Switches (SPST) The SW11 DIP switch has eight connections to the PolarFire device.
Board Components and Operations The following figure shows the SPST interface on the PolarFire Evaluation Board. Figure 17 • SPST Interface 1.8 V SW11 DIP1 DIP2 DIP3 DIP4 PolarFire DIP5 DIP6 DIP7 DIP8 For more information, see the Board-Level Schematics document (provided separately). 4.9.5 FMC HPC Connector The PolarFire Evaluation Board has one HPC (J34) FMC connector for the daughter cards for future...
Pin List Pin List For information on all of the package pins on the PolarFire device, see Package Pin Assignment Table. Microsemi Proprietary UG0747 Revision 5.0 Arrow.com. Downloaded from...
Appendix 1: Running the Demo Design Appendix 1: Running the Demo Design The onboard PolarFire FPGA comes with a programmed design. For more information on running the demo, see DG0755: PolarFire FPGA JESD204B Standalone Interface. Microsemi Proprietary UG0747 Revision 5.0 Arrow.com.
Appendix 2: Programming PolarFire FPGA Using the On-Board FlashPro5 Appendix 2: Programming PolarFire FPGA Using the On-Board FlashPro5 The PolarFire Evaluation Board includes onboard FlashPro5 programmer hardware. An external programmer hardware is therefore not required to program the PolarFire device. The device can be programmed using the FlashPro software installed on the host PC.
Appendix 3: Power Monitoring Appendix 3: Power Monitoring The SmartFusion A2F 200 device on the PolarFire Evaluation Board, monitors the voltage and current on different PolarFire power rails. It measures the current for different components and displays the power on the Microsemi PowerMonitor application. PowerMonitor is a Graphical User Interface (GUI) application that runs on the host PC.
Appendix 3: Power Monitoring Installing PowerMonitor To install PowerMonitor: Extract the contents of the polarfire_power_monitor.rar file. From POWER_MONITOR_GUI\Installer folder, double-click the setup.exe file. Follow the instructions displayed on the installation wizard. After successful installation, PowerMonitor appears on the Start menu of the host PC desktop. From the Start menu, click PowerMonitor.
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Appendix 3: Power Monitoring Note: For more information about the recommended minimum and maximum operating voltage of each rail, see the “Recommended Operating Conditions” section of DS0141: PolarFire FPGA Datasheet. The PowerMonitor GUI has the following buttons: • Graph—Click this button to view the power consumed by VDD_REG, VDDA_REG, VDDA25, and VDD25_DUT rails, and the total device power.
Appendix 4: Performance Data Appendix 4: Performance Data This section describes the performance results of MPF300T Evaluation Kit with different SERDES protocols. All of the steps required to set up the test environment are described. The section also provides information about eye diagram and jitter, and how they vary with protocol. All the measurements are taken on MPF300T Evaluation Kit with 23 GHz Tektronix scope.
Appendix 4: Performance Data 10.2 JESD204B Results The following driver settings are used for JESD measurements: • Signal amplitude: 500 mV • De-emphasis: 0 dB • Pattern used: JSPAT (500 bits) • Driver Impedance: 100 Ω • Data Rate: 12.5 Gbps The following table summarizes the measurements captured by the scope at 12.5 Gbps transmitter data rate and at a BER of 10E-12.
Appendix 4: Performance Data 10.3 10BASE-G KR The following driver settings are used for 10BASE-G KR measurements: • Signal amplitude: 1000 mV • De-emphasis: -1 dB • Pattern used: PRBS31 • Driver impedance: 180 Ω • Data rate: 10.3125 Gbps The following table summarizes the measurements captured by the scope at 10.3125 Gbps transmitter data rate and at a BER of 10E-12.
Appendix 4: Performance Data 10.4 Interlaken The following driver settings are used for Interlaken measurements: • Signal amplitude: 500 mV • De-emphasis: 0 dB • Pattern used: PRBS31 • Driver impedance: 100 Ω • Data rate: 10.3125 Gbps The following table summarizes the measurements captured by the scope at of 10.3125 Gbps transmitter data rate and at a BER of 10E-12.
Appendix 4: Performance Data 10.5 CPRI The following driver settings are used for CPRI measurements: • Signal amplitude: 1000 mV • De-emphasis: -1 dB • Pattern used: PRBS31 • Driver Impedance: 180Ω • Data Rate: 10.137 Gbps The following table summarizes the measurements captured by the scope at 10.137 Gbps transmitter data rate and at a BER of 10E-12.
Appendix 5: Errata Appendix 5: Errata This section contains information about known issues specific to the PolarFire Evaluation Board. 11.1 Errata Descriptions 11.1.1 Hot swapping is not supported on Programming headers J32, J29, PCIe CONN (CON3), SFP+ cage (J36), GPIO headers (J7, J8) This restriction applies to Rev B and C of the board.
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