Step (Single-Step, Every Line); Stepi (Single-Step, Every Mnemonic) [Icd Mini / Sim] - Epson S5U1C17001C Manual

8 Debugger
step
(single-step, every line)
stepi
(single-step, every mnemonic)
Operation
Single-steps the target program from the current PC address. Lines and instructions in the called functions or subroutines also
are single-stepped.
step: : Single-steps the program by executing one source line at a time. In C sources, one line of C instruction
(all multiple expanded mnemonics) are executed as one step. In assembly sources, instructions are executed the same way as
for stepi.
stepi: Single-steps the program by executing one assembler instruction (in mnemonic units) at a time.
In addition to one line or instruction, a number of steps to execute can also be specified.
However, even before all specified steps are completed, the program may be halted by one of the following causes:
 Already set break conditions are met.
 The [Suspend] button is clicked.
Format
step [Count]
stepi [Count]
Number of steps to execute (decimal or hexadecimal)
Count:
One step is assumed if omitted.
Conditions: 1 ≤ Count ≤ 0x7fffffff
Usage example
■Example 1
(gdb) step
The source line displayed on the current PC is executed.
■Example 2
(gdb) stepi
The instruction (in mnemonic units) is executed at the address displayed on the current PC.
■Example 3
(gdb) step 10
sub (k=5) at main.c:20
Ten lines are executed from the source line displayed on the current PC.
■Example 4
(gdb) stepi 10
main () at main.c:13
Ten instructions (in mnemonic units) are executed from the address displayed on the current PC.
Notes
 The program cannot be single-stepped from an address that does not have source information (i.e., debugging information
included in the object). The program can be run continuously, however, by using the continue command.
 To run the program from the beginning, execute c17 rst (reset) before step or stepi.
 Even with stepi, ext-based extended instructions are executed collectively (i.e., entire extended instruction set consisting
of two or three instructions) as one step.
 Interrupts are accepted even while single-stepping the program.
Similarly, the halt and slp instructions are executed while single-stepping the program, causing the CPU to enter standby
status. The CPU exits standby status when an external interrupt is generated. Clicking the [Suspend] button also releases the
CPU from standby mode.
8-24 Seiko Epson Corporation
[ICD Mini / SIM]
S5U1C17001C Manual
(Rev. 1.0)