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External Reset
ATtiny15L
16
Figure 13. "MCU Start-up, RESET Tied to V
V
POT
VCC
V
RESET
TIME-OUT
INTERNAL
RESET
Figure 14. MCU Start-up, RESET Extended Externally
V
POT
VCC
RESET
TIME-OUT
INTERNAL
RESET
An External Reset is generated by a low-level on the RESET pin. Reset pulses longer
than 500 ns will generate a reset, even if the clock is not running. Shorter pulses are not
guaranteed to generate a reset. When the applied signal reaches the Reset Threshold
Voltage (V
) on its positive edge, the delay timer starts the MCU after the Time-out
RST
period t
has expired.
TOUT
Figure 15. External Reset during Operation
CC
RST
t
TOUT
V
RST
t
TOUT
1187H–AVR–09/07
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