I/O Memory
ATtiny15L
10
Figure 11. Single Cycle ALU Operation
System Clock Ø
Total Execution Time
Register Operands Fetch
ALU Operation Execute
Result Write Back
The I/O space definition of the ATtiny15L is shown in Table 2.
Table 2. ATtiny15L I/O Space
Address Hex
Name
$3F
SREG
$3B
GIMSK
$3A
GIFR
$39
TIMSK
$38
TIFR
$35
MCUCR
$34
MCUSR
$33
TCCR0
$32
TCNT0
$31
OSCCAL
$30
TCCR1
$2F
TCNT1
$2E
OCR1A
$2D
OCR1B
$2C
SFIOR
$21
WDTCR
$1E
EEAR
$1D
EEDR
$1C
EECR
$18
PORTB
$17
DDRB
$16
PINB
$08
ACSR
$07
ADMUX
T1
T2
(1)
Function
Status Register
General Interrupt Mask Register
General Interrupt Flag Register
Timer/Counter Interrupt Mask Register
Timer/Counter Interrupt Flag Register
MCU Control Register
MCU Status Register
Timer/Counter0 Control Register
Timer/Counter0 (8-bit)
Oscillator Calibration Register
Timer/Counter1 Control Register
Timer/Counter1 (8-bit)
Timer/Counter1 Output Compare Register A
Timer/Counter1 Output Compare Register B
Special Function I/O Register
Watchdog Timer Control Register
EEPROM Address Register
EEPROM Data Register
EEPROM Control Register
Data Register, Port B
Data Direction Register, Port B
Input Pins, Port B
Analog Comparator Control and Status Register
ADC Multiplexer Select Register
T3
T4
1187H–AVR–09/07
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