Hitachi HIDIC MICRO-EH Applications Manual page 128

Item number Application instructions-8
Ladder format
LSR (d, n)
Instruction format
LSR (d, n)
Usable I/O
d I/O to be shifted
Number of bits to be
n
shifted
Function
•
Shifts the contents of d to the right (toward the lower digits) by n bits.
•
"0" is set from the most significant bit to the nth bit.
•
The content of the nth bit from the least significant bit is set in C (R7F0).
Before execution
After execution
0 0 0
Most significant bit (MSB)
If d is a word: Designates the shift amount, depending on the contents (0 to 15) of the lower 4 bits (b3 to b0) of n
(WX, WY, WR, WM, TC). (Upper bits are ignored and considered as "0.")
The n (constant) can be set to 0 to 15 (decimal).
If d is a double word: Designates the shift amount, depending on the contents (0 to 31) of the lower 5 bits (b4 to b0) of n
(WX, WY, WR, WM, TC). (Upper bits are ignored and considered as "0.")
The n (constant) can be set to 0 to 31 (decimal).
Notes
•
If n is equal to "0," the shifting is not performed. The previous state is retained in C.
Program example
X00001 DIF1
Program description
•
When X00001 rises, the content of WR0000 is shifted to the right by one bit.
At this time, "0" is set in b15 and the value of b0 immediately prior to the shift is set in R7F0.
Name
Condition code
R7F4 R7F3 R7F2
DER ERR SD
Number of steps
Condition
Bit
R, TD, SS,
X Y M CU, CT WX WY
d
n bits
B
0 0
n bits
Least significant bit (LSB)
LSR (WR0000 ,1 )
5-78
Chapter 5 Instruction Specifications
Logical shift right
Processing time (µs)
R7F1 R7F0
Average Maximum
V C
36
↕
Steps
3 45
Word Double word
WR, DR,
WM TC DX DY DM
C (R7F0)
B
(R7F0)
LD
AND DIF1
[
LSR
]
Remark
Upper case: W

Lower case: DW

Other
The constant is set in
decimal.
X00001
(WR0000 ,1)