Hitachi HIDIC MICRO-EH Applications Manual page 221

(4) Phase counting mode 3
In this mode the counter counts at the rising and falling edge of input 1B. It counts up when input 1A is more ahead of
input 1B, and down when input 1A is lagging behind input 1B.
Input 1A
Input 1B
Count
value
Off preset
On preset
Coincidence
output
Figure 8.17 Counting operation of phase counting mode 3
Input 1A
1 (High)
0 (Low)
↓ (Falling edge)
↑ (Rising edge)
0 (Low)
1 (High)
↓ (Falling edge)
↑ (Rising edge)
(5) Clear input operation (common to all the phase counting modes)
The count value is cleared at the rising edge of input 1Z. As an example, the clear operation of phase counting mode 4 is
shown in Figure 8.18. (The clear operation works identically for all four phase counting modes.)
Input 1A
Input 1B
Input 1Z
Count
value
Off preset
On preset
Coincidence
output
Figure 8.18 Count value clear operation (phase counting mode 4)
Chapter 8 High-speed counter, PWM / Pulse train output and Analogue I/O
Input 1B
↑ (Rising edge)
↓ (Falling edge)
1 (High)
0 (Low)
↑ (Rising edge)
↓ (Falling edge)
0 (Low)
1 (High)
8-12
Operation
Up count
Do not count
Down count
Do not count