Hitachi HIDIC MICRO-EH Applications Manual page 119

Item number Application instructions-2
Ladder format
BRES (d, n)
Instruction format
BRES (d, n)
Usable I/O
d I/O to be set the bit
n Bit location to be reset
Function
•
Sets the nth bit in the I/O (word or double word) specified by d to "0."
•
Other bit contents are unaltered.
. . . . . . . . . . . . . . . . . .
n+1
If d is a word: Designates the bit location depending on the contents (0 to 15) of the lower 4 bits (b3 to b0) of n (WX,
WY, WR, WM, TC). (Upper bits are ignored and considered as "0.")
The n (constant) can be set to 0 to 15 (decimal).
If d is a double word: Designates the bit location depending on the contents (0 to 31) of the lower 5 bits (b4 to b0) of n (WX,
WY, WR, WM, TC). (Upper bits are ignored and considered as "0.")
The n (constant) can be set to 0 to 31 (decimal).
Name
Condition code
R7F4 R7F3 R7F2
DER ERR SD
Number of steps
Condition
Bit
R, TD, SS,
X Y M CU, CT WX WY
d
. . . . . . . . . . . . . . . . . . . . . . . .
n n-1
0
Reset to "0".
5-69
Chapter 5 Instruction Specifications
Bit reset
Processing time (µs)
R7F1 R7F0
Average Maximum
V C
29
Steps
3 38
Word Double word
WR, DR,
WM TC DX DY DM
5 4 3 2 1 0
Remark
Upper case: W

Lower case: DW

Other
The constant is set in
decimal.