Details Of Buffer Memory Addresses - Mitsubishi Electric MELSEC iQ-R Series User Manual

Details of buffer memory addresses

This section describes the details of the buffer memory addresses of the pulse input module.
This chapter describes I/O signals and buffer memory addresses for CH1. For details on the I/O signals and
buffer memory addresses for CH2 and later, refer to the following.
Page 57 List of I/O signals
Page 65 Lists of buffer memory addresses
CH1 Sampling pulse number
The pulse number converted to a unit pulse number by the pre-scale function or moving average function is stored as a 16-bit
unsigned binary value.
b15 b14 b13 b12 b11 b10 b9
(1) Data section
The count range is from 0 to 32767.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Sampling pulse number
CH Sampling pulse number (when Q series-
compatible mode is used)
■Refreshing cycle
After 'CH1 Count enable' (Y18) is turned on to start the count operation, refreshing is performed in the count cycle set by 'CH1
Count cycle setting value' (Un\G142). The default refreshing cycle is 1s.
■Sampling pulse number reset
Carrying out the following resets 'CH1 Sampling pulse number' (Un\G0) to 0.
• Setting 'CH1 Counter reset request' (Un\G386) to Reset request (1).
• Turning off and on 'Operating condition setting request flag' (Y1)
APPX
74
Appendix 3 Buffer Memory Areas
b8 b7 b6 b5 b4 b3 b2
(1)
CH1
0
0
b1 b0
CH2 CH3 CH4
16 32 48
32 64 96
CH5 CH6 CH7
64 80 96
128 160 192
CH8
112
224