Table 1-1. Mvme6100 Features Summary - Motorola MVME6100-0161 Programmer's Reference Manual

Mvme6100 series
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Board Description and Memory Maps
1
Feature
Processor
L3 Cache
Flash
System Memory
Memory Controller
PCI Host Bridge
Dual 10/100/1000 Ethernet
Interrupt Controller
PCI Interface
2
I
C Interface
NVRAM
Real-Time Clock
Watchdog Timer
On-board Peripheral
Support
1-2
The following table lists the features of the MVME6100.

Table 1-1. MVME6100 Features Summary

Description
– Single 1.3 GHz MPC7457 processor
– Bus clock frequency at 133 MHz
– 36-bit address, 64-bit data buses
– Integrated L1 and L2 cache
– 2MB using DDR SRAM
– Bus clock frequency at 211 MHz
– Two banks (A & B) of soldered Intel StrataFlash devices
– 8 to 64MB supported on each bank
– Boot bank is switch selectable between banks
– Bank A has combination of software and hardware write-protect
scheme
– Bank B top 1MB block can be write-protected through
software/hardware write-protect control
– Two banks on board for up to 2GB using 256Mb or 512Mb
devices
– Bus clock frequency at 133 MHz
– Provided by Marvell MV64360 system controller
– 32KB provided by MK48T37
– Dual 10/100/1000 Ethernet ports routed to front panel RJ-45
connectors, one optionally routed to P2 backplane
– Two asynchronous serial ports provided by an ST16C554D; one
serial port is routed to a front panel RJ-45 connector and the second
serial port is optionally routed to the P2 connector for rear I/O or
on-board header
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