Motorola MVME6100-0161 Programmer's Reference Manual page 50

Table 2-8. MV64360 Interrupt Assignments (continued)
GPP
Group MV64360
GPP[18]
GPP[19]
GPP[20]
GPP[21]
GPP[22]
GPP[23]
3 GPP[24]
GPP[25]
GPP[26]
GPP[27]
Notes
http://www.motorola.com/computer/literature
Edge/Level Polarity
Level Low
Level Low
Level Low
Level Low
Level Low
Level Low
1. The interrupting device is addressed from the MV64360 PCI
Bus 0.
2. The interrupting device is addressed from the MV64360 PCI
Bus 1.
3. The interrupting device is addressed from the MV64360
Device Bus.
MV64360 Interrupt Controller
Interrupt Source
PCI-PMC 0 INTC#, PMC 1
INTA#
PCI-PMC 0 INTD#, PMC 1
INTB#
PCI-VME INT 0 (Tsi148
LINT0#), PMCspan INT 2
PCI-VME INT 1 (Tsi148
LINT1#), PMCspan INT 3
PCI-VME INT 2 (Tsi148
LINT2#), PMCspan INT 0
PCI-VME INT 3 (Tsi148
LINT3#), PMCspan INT 1
Reserved for SROM
initialization active InitAct
output
Reserved for Watchdog
Timer WDE# output
Reserved for Watchdog
Timer WDNMI# output
Reserved for future device
interrupt
2
Notes
2
2
1,5
1,5
1,5
1,5
2-17