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Board Description and Memory Maps
1
Table 1-2. Default Processor Address Map (continued)
Processor Address
Start
2800 0000
2A00 0000
4200 0000
4304 0000
F100 0000
F101 0000
F200 0000
F400 0000
F600 0000
F800 0000
FF00 0000
FC00 0000
1-6
End
Size
29FF FFFF
32M
41FF FFFF
384M
4303 FFFF
256K
F0FF FFFF
2783M
F100 FFFF
64K
F1FF FFFF
16M-64K
F3FF FFFF
32M
F5FF FFFF
32M
F7FF FFFF
32M
FEFF FFFF
112M
FF7F FFFF
8M
FFFF FFFF
64M
Note
Set by configuration resistors.
Definition
PCI Bus 1 Memory Space 3
Unassigned
MV64360 Integrated SRAM
Unassigned
Internal Registers
Unassigned
PCI Bus 0 Memory Space 1
PCI Bus 0 Memory Space 2
PCI Bus 0 Memory Space 3
Unassigned
Device CS3*
Boot Flash (Bank A or B
depending on S4:3 switch
setting)
Computer Group Literature Center Web Site
Notes
See
Note
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