Table 1-1. Mvme5500 Features Summary - Motorola MVME5500 Programmer's Reference Manual

Board Description and Memory Maps
1
Feature
Processor
L3 Cache
Flash
System Memory
Memory Controller
Processor Host Bridge
PCI Interfaces
Interrupt Controller
Counters/Timers
1-2
The following table lists the features of the MVME5500.

Table 1-1. MVME5500 Features Summary

Description
– Single 1 GHz MPC7455 processor
– Bus clock frequency at 133 MHz
– 2MB using DDR SRAM
– Bus clock frequency at 200 MHz
– 8MB Flash soldered on board
– 32MB expansion Flash soldered on board
– Two banks on-board for 512MB using 256Mb devices
– Expansion connector for a mezzanine board with two banks for
512MB using 256Mb devices
– Double-bit-error detect, single-bit-error correct across 72 bits
– Bus clock frequency at 133 MHz
– Provided by GT-64260B
– Supports one to four banks of SDRAM at up to 1GB per bank
– Provided by GT-64260B
– Supports MPX mode or 60x mode
– Provided by GT-64260B
– Two independent 64-bit interfaces, one compliant to PCI spec rev
2.1 (Bus 0.0) and the other compliant to PCI spec rev 2.2 (Bus 1.0)
– Bus clock frequency at 66 MHz
– Provided by the HiNT PCI 6154 secondary interface
– One 64-bit interface, compliant to PCI spec rev 2.1 (Bus 0.1)
– Bus clock frequency at 33 MHz
– Provided by GT-64260B
– Interrupt sources internal to GT-64260B
– Up to 32 external interrupt inputs
– Up to seven interrupt outputs
– Eight 32-bit counters/timers in GT-64260B
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