Samsung SF6500 Service Manual page 78

5. Circuit Descriptions
5-1 Main PBA
The main board consists of CPU, System controller, Fax modem, Modem interface, Image processor,
Printing ASIC, I/O port gate array. Detail description is provided below.
5-1-1 Memory & I/O Map
BMC (Bus and Memory Controller) in the system
controller interfaces directly with CPU, ROM,
SRAM, and I/O.
FFFFF
ON-CHIP INTERNAL REGISTER
(1 Mbyte)
F00000
EFFFF
I/O (1 Mbyte)
E00000
DFFFF
SRAM(2 Mbyte)
C00000
BFFFF
EPROM (4 Mbyte)
800000
7FFFF
DRAM (4 Mbyte)
400000
3FFFF
DRAM (4 Mbyte)
000000
Figure 5-1 Memory & I/O Map
Samsung Electronics
5-1-2 CPU and System Controller
ADO-AD15
A16-A23
INT, HOLD
CPU
HBE,ADS, DDIN
CLOCK
SYSTEM
ADO-AD7
CONTROLLER
MA1-MA5
MODEM
MCS, RD, WEO
MIRQ
ADO-AD15
MA1-MA7
PIC_ CS
DDIN
ECP
PIC_ INT
PIC_ DRQ
PIC DARK
Figure 5-2 Hardware Interface Signals
ADO-AD15
MEMORY
MA1-MA11
(DRAM)
CAS, WEO, WE1
WEO, WE1
DRQ, DAK, TRIG
CS, RESET
IMAGE
ADO-AD15
PROCESSOR
(SDIP III)
MA1-MA5
ADO-AD7
MA1-MA5, A22
PRINT
ASIC
CS, CHSYNC
SCLK, SDATA
T R
X X
D D
L I U
5-1