Chapter 3: BIOS Setup
Chipset
This section gives you functions to configure the system based on the
specific features of the chipset. The chipset manages bus speeds and access
to system memory resources.
Aptio Setup Utility - Copyright (C) 2012 American Megatrends, Inc.
Main
Advanced
Chipset
Boot
► PCH-IO Configuration
► System Agent (SA) Configuration
Version 2.15.1236. Copyright (C) 2012 American Megatrends, Inc.
PCH-IO Configuration
PCH-IO parameters.
System Agent (SA) Configuration
System Agent (SA) parameters.
Copyright © 2014 NEXCOM International Co., Ltd. All Rights Reserved.
Save & Exit
Security
PCH Parameters
→←: Select Screen
↑↓: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
PCI Express Configuration
Aptio Setup Utility - Copyright (C) 2012 American Megatrends, Inc.
Chipset
PCI Express Configuration
PCI Express Clock Gating
DMI Link ASPM Control
DMI Link Extended Synch Control
PCIe-USB Glitch W/A
PCIE Root Port Function Swapping
Subtractive Decode
►
PCI Express Root Port 1
►
PCI Express Root Port 2
PCIE Port 3 is assigned to LAN
►
PCI Express Root Port 4
►
PCI Express Root Port 5
►
PCI Express Root Port 6
PCI Express Root Port 7
►
►
PCI Express Root Port 8
Version 2.15.1236. Copyright (C) 2012 American Megatrends, Inc.
PCI Express Clock Gating
Enables or disables PCI Express clock gating for each root port.
DMI Link ASPM Control
Enables or disables Active State Power Management of the DMI link.
DMI Link Extended Synch Control
Enables or disables DMI extended synchronization.
PCIe-USB Glitch W/A
Enables or disables PCIe-USB glitch workaround.
43
Enable or disable PCI Express
Clock Gating for each root port.
[Enabled]
[Enabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
→←: Select Screen
↑↓: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
NEX 885 User Manual
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