M3062PT2-EPB User's Manual
Read timing
BCLK
td(BCLK-CS)
CSi
td(BCLK-AD)
ADi
BHE
td(BCLK-ALE)
ALE
RD
DBi
Write timing
BCLK
td(BCLK-CS)
CSi
td(BCLK-AD)
ADi
BHE
td(BCLK-ALE)
ALE
WR,
WRL ,WRH
DBi
Figure 4.4 Memory expansion mode and microprocessor mode (3 wait, accessing external area)
REJ10J0868-0200 Rev.2.00 January 16, 2006
tcyc
th(BCLK-ALE)
td(BCLK-RD)
tac2(RD-DB)
Hi-Z
tcyc
th(BCLK-ALE)
td(BCLK-WR)
td(BCLK-DB)
Hi-Z
td(DB-WR)
4. Hardware Specifications
th(BCLK-CS)
th(RD-CS)
th(BCLK-AD)
th(RD-AD)
th(BCLK-RD)
tsu(DB-RD)
th(RD-DB)
th(BCLK-CS)
th(WR-CS)
th(BCLK-AD)
th(WR-AD)
th(BCLK-WR)
th(BCLK-DB)
th(WR-DB)
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