The Control System - Siemens 6SR41 series Product User Manual

Theory

3.3 The Control System

3.3 The Control System
The block diagram in Figure "Block Diagram of Harmony Control Structure" shows the
implementation of the Harmony Control System. The Control System consists of the
following functional blocks: Signal Interface and Conditioning, an A/D Converter, a
Processor, a Digital Modulator, and Fiber Optic Interfaces.
The Signal Interface processes the feedback signals collected from the drive. These circuits
scale and filter the feedback signals before passing them along to the A/D Converter.
Provisions are included to interface to an ESTOP signal.
The function of the A/D Converter is to sample the input and output currents and voltages,
and convert them to digital signals for the processor. The sample rate varies from 3 kHz to
6 kHz and is a function of the carrier frequency (which is also the IGBT switching frequency),
and the number of "available" cells in the system. The Digital Modulator generates the signal
for the A/D converters to start sampling. Once the A/D converters finish sampling, they
provide an interrupt to the processor to begin its calculation cycle.
Note
The A/D converter function includes provisions for encoder feedback monitoring.
The processor performs all of the functions for motor control and generates three-phase
voltage commands for the digital modulator. In addition, it monitors the input voltages and
currents to provide metering functions (such as power factor, input power, and harmonic
calculation), input protection (excessive losses, excessive reactive current, under-voltage,
and single-phasing), and input voltage magnitude, frequency, and phase angle for
Synchronous Transfer.
The Digital Modulator contains registers that are used for communication with the Processor.
For each phase voltage command, the processor writes two values to the modulator. The
first for the present time instant and the second for a time instant that is extrapolated for half
a sampling period. A voltage increment, or step corresponding to these values, and the
direct number of steps between values, is also written to the modulator. These phase
commands are written by the processor once every sampling period.
The modulator creates a set of timing signals that cause the control software to sample the
feedback signals and run the control and monitoring algorithms. These timing signals are
used to transmit information to the cells simultaneously, once every 9 to 11 microseconds.
This time (is determined by the processor and) is based on the drive configuration, and is
fixed for a particular configuration. In between every transmission period, the modulator
performs interpolation, phase-shifted carrier generation, pulse-width modulation (PWM), and
cell communication. The resulting PWM commands for each cell, along with the mode of
operation, is assembled as a data packet that is transmitted to each cell through dedicated
Fiber Optic Interfaces. In response to the transmitted data, the modulators receive a similar
data packet from each of the cells. The return message from the cells contains status bits
that are decoded by the modulator and conveyed to the processor.
Every transmission is checked for completeness and parity. If an error is detected, a link fault
is generated. The data packet sent to the power cells provides operational mode and
switching information. The local communication circuits in each power cell operate as slaves
to the Modulator. The local control circuits on each power cell convert the information
received to IGBT firing pulses.
The return packet echos the operational mode and cell status. Should an individual cell be
bypassed, the modulator commands all power cells to disable their outputs with the next
message to the cells. The worst case shut down of all power cells requires 2 transmission
cycles or 22 µsec. maximum.
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Operating Instructions, Version AE 12/2009, A5E01454341C
Product User Manual