PCI-DAS6031 & PCI-DAS6033 User's Guide
Analog output pacing and triggering
DAC pacing
(software programmable)
DAC gate sources
(software programmable)
DAC gating modes
DAC trigger sources
DAC triggering modes
DAC pacer Out
RAM buffer Size
Data transfer
DMA modes
Waveform generation throughput
Analog trigger
Analog trigger sources
Software selectable
Analog trigger levels
Analog trigger modes
Analog gate modes
Resolution
Accuracy
Bandwidth (-3 dB)
Table 13. Analog output pacing and triggering specifications
Internal counter – ASIC. Selectable time base:
! Internal 40 MHz, 50 ppm stability.
! External Source via AUXIN<5:0>, SW selectable.
External convert strobe: D/A UPDATE
Software paced
External digital: D/A START TRIGGER
External analog: ATRIG input
Software gated
External digital: Programmable, active high or active low, level or edge
External analog: Refer to the Analog Trigger section below
External digital: D/A START TRIGGER
External analog: ATRIG input
Software triggered
External digital: Software-configurable for rising or falling edge.
External analog: Software-configurable for positive or negative slope.
Available at user connector D/A PACER OUT
16 K samples
DMA
Programmed I/O
Update DACs individually or simultaneously, software selectable.
Demand or non-demand using scatter gather.
100 kS/s max per channel, 2 channels simultaneous
Table 14. Analog trigger specifications
External: ATRIG input
CH0 IN through CH63 IN, first channel in scan
ATRIG input: ±10 V
CH0 IN through CH63 IN: Full-scale, range dependent
External analog: Software-configurable for:
! Positive or negative slope
External analog: Software-configurable for:
! Above or below reference
! Positive or negative hysteresis
! In or out of window
12-bits, 1-in-4096
±1% of full-scale range max
ATRIG input
CH0 IN through CH63 IN
CH0 IN through CH63 IN
CH0 IN through CH63 IN
4 MHz
255 kHz
6-6
Specifications
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