Atrig Signal - Measurement Computing PCI-DAS6031 User Manual

PCI-DAS6031 & PCI-DAS6033 User's Guide

ATRIG signal

In addition to standard digital trigger features, the PCI-DAS6031 and PCI-DAS6033 also provide analog
triggering capability. When using the analog trigger, acquisitions may be started and controlled via an analog
signal. There are four trigger/gate modes available using the analog trigger feature:
! Trigger – positive or negative slope
! Gate – above reference or below reference
! Hysteresis – positive or negative hysteresis
! Window – inside or outside window
The trigger mode is used to start an acquisition sequence. The remaining modes provide gating functions during
an acquisition sequence which start and stop the acquisition based on the gate condition.
There are two possible inputs for the analog trigger source (see
pin on the 100-pin I/O connector. This is a software selectable dual-purpose pin that supports either digital or
analog trigger inputs. The source selection defaults to analog trigger on power-up and may be modified at any
time using InstaCal. The input range on the ATRIG pin is always ±10 V. 12-bit DACs are used to set the HI and
LO levels for the threshold(s). The threshold resolution in this mode is 4.88 mV per step.
Caution! Remove all analog inputs before configuring this pin as a digital input. Any voltage levels above
±15 V in this configuration may cause damage to the product!
The second possible analog trigger source is the post-gain version of any one of the 64 analog inputs. In this
mode, the voltage present on the first channel in the scan may be used to initiate the acquisition sequence.
Since the input to the analog trigger circuit has been scaled by the selected range, the effective resolution of the
thresholds is equal to the A/D's full-scale-range (±2.5 V) divided by 4096. For example, the ±2.5 V range
allows for 5 V/4096, or 1.2 mV of threshold resolution.
* Only applies to the first channel in the scan
The next section includes a detailed description of each mode of operation. In each case, a ±2 V triangle
waveform is used as the ATRIG input source. The THRESH_HI is set to 1.0 V and the THRESH_LO signal is
set to -1.0 V.
In the following analog trigger signal diagrams, the bold portion of the waveform indicates the data acquired for
the given ATRIG mode.
Channel x*
PGIA
Figure 4-15. ATRIG circuit
Figure 4-15 ). The first is the AUXIN0/ATRIG
A/D
THRESH-HI
12-BIT
THRESH-LO
12-BIT
4-9
Functional Details