Measurement Computing PCI-DAS6031 User Manual page 48

PCI-DAS6031 & PCI-DAS6033 User's Guide
Pin Signal Name
1 LLGND
2 CH0 IN HI
3 CH0 IN LO
4 CH1 IN HI
5 CH1 IN LO
6 CH2 IN HI
7 CH2 IN LO
8 CH3 IN HI
9 CH3 IN LO
10 CH4 IN HI
11 CH4 IN LO
12 CH5 IN HI
13 CH5 IN LO
14 CH6 IN HI
15 CH6 IN LO
16 CH7 IN HI
17 CH7 IN LO
18 LLGND
19 CH8 IN HI
20 CH8 IN LO
21 CH9 IN HI
22 CH9 IN LO
23 CH10 IN HI
24 CH10 IN LO
25 CH11 IN HI
26 CH11 IN LO
27 CH12 IN HI
28 CH12 IN LO
29 CH13 IN HI
30 CH13 IN LO
31 CH14 IN HI
32 CH14 IN LO
33 CH15 IN HI
34 CH15 IN LO
35 AISENSE
36 D/A OUT 0 *
37 D/A GND
38 D/A OUT1 *
39 PC +5 V
40 AUXOUT0 / D/A PACER OUT
41 AUXOUT1 / A/D PACER OUT
42 AUXOUT2 / SCANCLK
43 AUXIN0 / A/D CONVERT / ATRIG
44 N/C
45 AUXIN1 / A/D START TRIGGER
46 AUXIN2 / A/D STOP TRIGGER
47 AUXIN3 / D/A UPDATE
48 AUXIN4 / D/A START TRIGGER
49 AUXIN5 / A/D PACER GATE
50 GND
* = N/C on PCI-DAS6033
Table 27. 32-channel differential mode pin out
6-12
Pin Signal Name
51 LLGND
52 CH16 IN HI
53 CH16 IN LO
54 CH17 IN HI
55 CH17 IN LO
56 CH18 IN HI
57 CH18 IN LO
58 CH19 IN HI
59 CH19 IN LO
60 CH20 IN HI
61 CH20 IN LO
62 CH21 IN HI
63 CH21 IN LO
64 CH22 IN HI
65 CH22 IN LO
66 CH23 IN HI
67 CH23 IN LO
68 LLGND
69 CH24 IN HI
70 CH24 IN LO
71 CH25 IN HI
72 CH25 IN LO
73 CH26 IN HI
74 CH26 IN LO
75 CH27 IN HI
76 CH27 IN LO
77 CH28 IN HI
78 CH28 IN LO
79 CH29 IN HI
80 CH29 IN LO
81 CH30 IN HI
82 CH30 IN LO
83 CH31 IN HI
84 CH31 IN LO
85 DIO0
86 DIO1
87 DIO2
88 DIO3
89 DIO4
90 DIO5
91 DIO6
92 DIO7
93 CTR1 CLK
94 CTR1 GATE
95 CTR1 OUT
96 GND
97 CTR2 CLK
98 CTR2 GATE
99 CTR2 OUT
100 GND
Specifications