Analog Input / Output Calibration; Digital Input / Output; Interrupts - Measurement Computing PCI-DAS6031 User Manual

PCI-DAS6031 & PCI-DAS6033 User's Guide

Analog input / output calibration

Recommended warm-up time
Calibration
Onboard calibration reference
Calibration interval

Digital input / output

Digital type
Number of I/O
Configuration
Input high voltage
Input low voltage
Output high voltage (IOH = -32 mA)
Output low voltage (IOL = 32 mA)
Data transfer
Power-up / reset state

Interrupts

Interrupts
Interrupt enable
ADC Interrupt sources
(software programmable)
DAC Interrupt sources
(software programmable)
Table 15. Analog I/O calibration specifications
15 minutes
Auto-calibration, calibration factors for each range stored on board in non-
volatile RAM.
DC Level: 5.000 V± 1 mV. Actual measured values stored in EEPROM.
Tempco: 0.6 ppm/°C max
Long-term stability: ±6 ppm/sqrt (1000 hrs)
1 year
Table 16. Digital I/O specifications
Discrete, 5 V/TTL compatible
8
8-bits, independently programmable for input or output. All pins pulled up to
+5 V via 47 k resistors (default). Positions available for pull-down to ground.
Hardware selectable via zero Ohm resistors.
2.0 V min, 7.0 V absolute max
0.8 V max, –0.5 V absolute min
3.80 V min, 4.20 V typ
0.55 V max, 0.22 V typ
Programmed I/O
Input mode (high impedance)
Table 17. Interrupt specifications
PCI INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable through PLX9080
DAQ_ACTIVE:
DAQ_STOP:
DAQ_DONE:
DAQ_FIFO_1/4_FULL:
DAQ_SINGLE:
DAQ_EOSCAN:
DAQ_EOSEQ:
DAC_ACTIVE:
DAC_DONE:
DAC_FIFO_1/4_EMPTY:
DAC_HIGH_CHANNEL:
6-7
Interrupt is generated when a DAQ sequence is
active.
Interrupt is generated when A/D Stop Trigger In is
detected.
Interrupt is generated when a DAQ sequence
completes.
Interrupt is generated when ADC FIFO is ¼ full.
Interrupt is generated after each conversion
completes.
Interrupt is generated after the last channel is
converted in multi-channel scans.
Interrupt is generated after each interval delay
during multi-channel scans.
Interrupt is generated when DAC waveform
circuitry is active.
Interrupt is generated when a DAC sequence
completes.
Interrupt is generated DAC FIFO is ¼ empty.
Interrupt is generated when the DAC high channel
output is updated.
Specifications