Mitsubishi Electric MELSEC iQ-R User Manual page 241

Trigger setting status monitor
This area stores the trigger setting status of the logic analyzer function.
Stored value
0
1
2
• Write the trigger setting to the flexible high-speed I/O control module with the configuration tool. ( Page 102 Logic
analyzer function)
• If the trigger setting is written to the flash ROM, the trigger setting is read from the flash ROM at power-on of the module. As
a result, Trigger setting enable (Auto trigger disable) (1) or Trigger setting enable (Auto trigger enable) (2) is stored in this
area at power-on of the module.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
Trigger setting status monitor
Trigger status monitor
This area stores the trigger status of the logic analyzer function.
Stored value
0
1
■Storing Trigger stop (0)
This value indicates a status in which generating sampling data by the logic analyzer function is stopped because of any of the
following conditions.
• After the trigger condition is satisfied, acquisition of sampling data is completed.
• Stop request (1) is stored in 'Trigger stop request' (Un\G121).
• A trigger stop request from the configuration tool is received.
• The trigger is stopped due to simulation execution.
• The hardware logic control is stopped by a hardware logic control stop request from the configuration tool or 'Hardware
logic control stop request' (Y5).
• "Write to Module (execution memory)" or "Write to Module (execution + flash ROM)" is executed with the configuration tool.
■Storing Trigger ready (1)
This value indicates a status in which sampling data is being generated until the trigger condition is satisfied after a trigger
start request is received because of any of the following conditions.
• Start request (1) is stored in 'Trigger start request' (Un\G120) during the hardware logic control.
• A trigger start request from the configuration tool is received during the hardware logic control.
• When the auto trigger is enabled, the hardware logic control is started by a hardware logic control start request from the
configuration tool or 'Hardware logic control start request' (Y4).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
Trigger status monitor
Description
Trigger setting disable
Trigger setting enable (Auto trigger disable)
Trigger setting enable (Auto trigger enable)
Buffer memory address
122
Description
Trigger stop
Trigger ready
Buffer memory address
123
Appendix 3 Buffer Memory Areas
A
APPX
239