Mitsubishi Electric MELSEC iQ-R User Manual page 132

Output
The following table shows the outputs of the SSI encoder block.
Variable name Data type
Clock Bit
Output Word
*1 The "Absolute Encoder" terminal of a 32-bit unsigned multi function counter block can be linked.
The refreshing cycle of a count value is calculated by the following formula because the module processing
time fluctuates within the range of 0 to 100s.
Refreshing cycle = (Data frame length + P + 1)  Clock cycle + Monoflop time + Module processing time (0 to
100s)
• P: 1 (for with parity) or 0 (for without parity)
• Clock cycle: Inverse of the transmission speed (for the transmission speed of 100kHz: 1/100000s = 10s)
Note that if an SSI encoder block is used together with other functions, the following delay times are added to
the refreshing cycle above.
• When an SI device terminal is used: Up to 200s
• When the flexible high-speed I/O control module is in the inter-module synchronous mode and "User
Address" of the input terminals or parameters is assigned to Hardware logic area (High speed area)
(Un\G1000 to Un\G1029): Up to 100s
3 CREATING A HARDWARE LOGIC
130
3.1 Main Blocks in the Hardware Logic Outline Window
Linkable block
External output
*1
Multi function counter
Output value Description
0, 1 Outputs the clock signal to perform synchronous data
communication with the SSI encoder.
When an SSI encoder block is arranged in the
hardware logic outline window, the "Clock" terminal of
the SSI encoder block and the "Input" terminal of an
external output block are automatically linked. The
link cannot be deleted or changed.
The following are the link destinations.
• Serial_Encoder0: OUT 0_DIF
• Serial_Encoder1: OUT 1_DIF
0 to 4294967295 Sets the position data acquired from the SSI encoder
to a count value of the multi function counter block
linked.