Clock Synchronization; Frequency Tracking And Phase Locking - GE L30 Instruction Manual

OVERVIEW
The restraint signal (I
where S is the slope setting for the ground differential function.
87G
The ground differential element picks up if the following condition holds.
where P is the pickup setting for the ground differential function.
87G
In other words, when the squared magnitude of the operating signal is greater than the total restraining squared signal,
the element operates. For additional security, the function is blocked if the restraining signal is high, indicating that the
87LG function is not required to clear high-current faults, allowing for more sensitive settings to be used for the 87LG
function.

10.1.8 Clock synchronization

Synchronization of data sampling clocks is needed in a digital differential protection scheme, because measurements
must be made at the same time. Synchronization errors show up as phase angle and transient errors in phasor
measurements at the terminals. By phase angle errors, we mean that identical currents produce phasors with different
phase angles. By transient errors, we mean that when currents change at the same time, the effect is seen at different
times at different measurement points. For best results, take samples simultaneously at all terminals.
In the case of peer-to-peer architecture, synchronization is accomplished by synchronizing the clocks to each other rather
than to a master clock. Each relay compares the phase of its clock to the phase of the other clocks and compares the
frequency of its clock to the power-system frequency and makes appropriate adjustments. The frequency and phase
tracking algorithm keeps the measurements at all relays within a plus or minus 25 microsecond error during normal
conditions for a two or three-terminal system. For four or more terminals, the error can be somewhat higher, depending on
the quality of the communications channels. The algorithm is unconditionally stable. In the case of two and three-terminal
systems, asymmetric communications channel delay is automatically compensated for. In all cases, an estimate of phase
error is computed and used to automatically adapt the restraint region to compensate. Frequency tracking is provided
that accommodates any frequency shift normally encountered in power systems.

10.1.9 Frequency tracking and phase locking

Each relay has a digital clock that determines when to take data samples and which is phase synchronized to all other
clocks in the system and frequency synchronized to the power-system frequency. Phase synchronization drives the
relative timing error between clocks to zero. It is needed to control the uncertainty in the phase angle of phasor
measurements, which are held to under 26 microseconds (0.6 degrees). Frequency synchronization to the power system
eliminates a source of error in phasor measurements that arises when data samples do not exactly span one cycle.
The figure is a block diagram for clock control for a two-terminal system. Each relay makes a local estimate of the
difference between the power-system frequency and the clock frequency based on the rotation of phasors. Each relay also
makes a local estimate of the time difference between its clock and the other clocks either by exchanging timing
information over communications channels or from information that is in the current phasors, depending on whichever
one is more accurate at any given time. A loop filter then uses the frequency and phase angle deviation information to
make fine adjustments to the clock frequency. Frequency tracking starts if the current at one or more terminals is above
0.125 pu of nominal; otherwise, the nominal frequency is used.
10
10-6
2
) is calculated as follows for three-terminal applications:
87G
CHAPTER 10: THEORY OF OPERATION
L30 LINE CURRENT DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL
Eq. 10-19
Eq. 10-20