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61
006fc
62
00448
U>tl
Line
addr,H
-----
------
63
00449
64
0044a
65
0044c
66
0044e
67
00450
68
0051d
69
0044d
70
006fc
71
00440
72
00442
73
00440
74
00444
75
0040f
76
00410
77
0040f
78
00412
79
00411
80
00414
81
00416
82
00414
83
00418
Getting Started 2-18
0440H, mem write
MOV ES:BYTE PTR 0500H[DI],BL
The instructions shown in the trace list above decide which caller will
call the WRITE_NUMBER subroutine. Line 58 shows the disassem-
bled mnemonic of the instruction which calls the WRITE_NUMBER
subroutine. The address information shows that the caller is
CALLER_2. Line 62 shows the MOV instruction associated with the
WRITE_NUMBER subroutine. To view the remaining instruction cy-
cles of the WRITE_NUMBER subroutine, enter the tl command
again.
8018x mnemonic,H
------------------------------------
009dH, opcode fetch
c305H, opcode fetch
6db8H, opcode fetch
264eH, opcode fetch
5fxxH, mem write
RET
0440H, mem read
cdebH, opcode fetch
e890H, opcode fetch
JMP SHORT 040fH
0002H, opcode fetch
8axxH, opcode fetch
25c7H, opcode fetch
MOV AL,BH
00ffH, opcode fetch
AND AX,#00ffH
f88bH, opcode fetch
fb8aH, opcode fetch
MOV DI,AX
33e8H, opcode fetch
Line 69 in the trace list above shows the RET instruction associated
with the WRITE_NUMBER subroutine. Line 68 shows the random
number 5FH is written to address 51DH.
The bus cycle data contains "don't cares" when bytes are read or writ-
ten. Lower byte writes are made to even addresses, and upper byte
writes are made to odd addresses.
Line 77 shows the AGAIN address associated with the next loop of the
program.
0.520 uS
.
0.160 uS
.
count,R
seq
---------
---
0.280 uS
.
0.120 uS
.
0.560 uS
.
0.520 uS
.
1.080 uS
.
0.560 uS
.
0.120 uS
.
0.840 uS
.
0.800 uS
.
0.520 uS
.
0.160 uS
.
0.400 uS
.
0.680 uS
.
0.560 uS
.
0.120 uS
.
0.400 uS
.
0.160 uS
.
0.400 uS
.
0.520 uS
.
0.160 uS
.
0.400 uS
.
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