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A
B
I BLOCK DIAGRAM
1
CB1
R.OUT
@8
@7
L.OUT
@6
@5
R.IN
@4
@3
L.IN
@2
AVCC
@1
/LOADIN
@0
!9
5V
!8
5V
!7
!6
MD
!5
(MDM-08A)
!4
!3
DSTB
2
!2
MDDATA
!1
KDATA
!0
o
DECK
i
MD-ST
u
RESET
y
PDOWN
t
BACKUP
r
DIGIN
e
w
DIGOUT
q
CB2
DIGITAL
OPTICAL
OUT
3
4
CB4
OPTICAL 1
4
3
DIGITAL
1
SEL
IN
2
CB3
IC2
OPTICAL 2
5
6
C
Va+6V
VD
IC1
3
10
5
8
Q1
D1,2
42
39
38
37
35
IC6 CPU
M30622M8-XXXFP
13
XL1
10MHz
15
5
94, 95, 97
87, 88
KEY MATRIX
SW601-606
JOG
ROTARY
ENCODER
SW613
D
E
See page 64
BUFFER
1
7
5
3
EEPROM
IC7
36
18
50
28 ~ 30
/MUTE
6
+VA
/RES
12
/PDN
19
20
31 ~ 34
DISPLAY DRIVE
Q13
IC601
D14,16
REMOTE
D15
SENSOR
U601
FL1
DISPLAY
V601
FL2
F
REC
BUFFER
AMP
LEVEL
AMP
3
7
5
VR202
IC4
IC5
5
1
3
IC3
7
Q4
Q5
IC3
Q6
Q7
1
MUTE
CONTROL
Q8,D3,4,6
-BV
+BV
IC8
D7-10
Q9,10
-VA
IC9
VD
Q11
TH401
L402
D11,12
Q2,14
D5
TH402
-BV
D17
G
H
MDX-E300
L
IN
R
ANALOG
L
OUT
R
57
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