Atmel ATmega48A Manual page 162

8271D–AVR–05/11
ATmega48A/PA/88A/PA/168A/PA/328/P
Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
Mode" on page 154
Table 18-7 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
rect PWM mode.
Table 18-7. Compare Output Mode, Phase Correct PWM Mode
COM2B1 COM2B0
0 0
0 1
1 0
1 1
Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 154 for more details.
• Bits 3, 2 – Reserved
These bits are reserved bits in the ATmega48A/PA/88A/PA/168A/PA/328/P and will always read
as zero.
• Bits 1:0 – WGM21:0: Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 18-8. Waveform Generation Mode Bit Description
Mode WGM2 WGM1
0 0 0
1 0 0
2 0 1
3 0 1
4 1 0
5 1 0
6 1 1
7 1 1
Notes: 1. MAX= 0xFF
2. BOTTOM= 0x00
for more details.
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.
Table 18-8. Modes of operation supported by the Timer/Counter
"Modes of Operation" on page
Timer/Counter
Mode of
WGM0 Operation
0 Normal
PWM, Phase
1
Correct
0 CTC
1 Fast PWM
0 Reserved
PWM, Phase
1
Correct
0 Reserved
1 Fast PWM
"Phase Correct PWM
(1)
"Phase Correct PWM Mode" on
151).
Update of TOV Flag
TOP OCRx at Set on
0xFF Immediate
0xFF TOP BOTTOM
OCRA Immediate
0xFF BOTTOM
– –
OCRA TOP BOTTOM
– –
OCRA BOTTOM
(1)(2)
MAX
MAX
MAX
–
–
TOP
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